CN1243416A - 制造多层电路板的方法和用该方法制造的多层电路板 - Google Patents

制造多层电路板的方法和用该方法制造的多层电路板 Download PDF

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CN1243416A
CN1243416A CN99110038A CN99110038A CN1243416A CN 1243416 A CN1243416 A CN 1243416A CN 99110038 A CN99110038 A CN 99110038A CN 99110038 A CN99110038 A CN 99110038A CN 1243416 A CN1243416 A CN 1243416A
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畠山秋仁
十河宽
小岛环生
堀尾泰彦
塚本胜秀
福村泰司
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Panasonic Holdings Corp
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Abstract

一种制造印刷电路有机基板的方法,包括下列步骤:在带有覆盖薄膜(1)并且具有压缩收缩性的多孔原材料基片(2)上钻通孔(3);把导电浆料(4)注满到通孔(3)内;从其通孔(5)注满了导电浆料(4)的多孔原材料基片(2)上除去覆盖薄膜(1);把金属箔(5)敷在已除去覆盖薄膜(1)的多孔原材料基片(2)的表面上;通过热压,将敷有金属箔(5)的多孔原材料基片(2)压缩;从而,通过导电浆料(4)中的导电物质使金属箔(5)之间实现电连接。

Description

制造多层电路板的方法和 用该方法制造的多层电路板
本发明涉及印刷电路板;特别是有关制造印刷电路有机基板的方法,在该有机基板的两面有金属箔;本发明还涉及到用上述方法制造的有机基板。
近来,随着电子设备越来越小型化,并且安装密度越来越高,因而,不仅在产业应用上,而且在一般日常生活中,都非常需要多层印刷电路板。在上述多层印刷电路板中,层与层之间的印刷图形通过内通孔而实现连接,这种连接结构必须有高的可靠性。
参照图10(a)至10(e),下面将叙述一种制造普通的双面印刷电路板的方法。
首先,如图10(a)所示,通孔83(在图10(a)至10(e)的每一幅图上仅示出了一个通孔83)位于绝缘基板82如玻璃-环氧树脂基板等的预定位置,基板的一面敷有一薄层81,而把第一铜箔84粘覆在其另一面,即基板82的下表面。然后,如图10(b)所示,把薄层81作为印刷掩膜,在通孔83内注满导电浆料85。然后,把薄层81从绝缘基板82上去除,如图10(c)所示,通孔83内填满了导电浆料85。不过,在这种情况下,往往有一定数量的导电浆料85,在绝缘基板82上呈隆起或高出状态地残留在通孔83的上部,其残留量取决于薄层81的厚度。接着如图10(d)所示,把第二铜箔86敷在绝缘基板82的上表面,使所述基板82和铜箔被彼此完全粘结在一起,同时,使导电浆料85凝固。然后,如图10(e)所示,根据需要对第一铜箔84和第二铜箔86作选择性腐蚀,以此形成所示的第一电路图形87a和第二电路图形87b。
在上述方法中,第一、第二电路图形87a和87b利用通孔83内注满的导电浆料85而实现内通孔连接,这样便获得了双面印刷电路板88。
下面参照图11(a)至11(d),以四层印刷电路板为例,叙述普通的多层印刷电路板的制造方法。
首先,如图11(a)所示,在绝缘基板92的一面设有薄层91并在其预定位置钻有通孔93,将该绝缘基板92粘附到按图10(a)至10(e)制成的第一双面印刷电路板88上。然后如图11(b)所示,把薄层91作为印刷掩模,在通孔93内注满导电浆料94。再从绝缘基板92上去除薄层91,如图11(c)所示,仅仅在通孔93内填满导电浆料94。接着,按照类似图10(a)至10(e)所示的那些步骤制作电路图形96a与96b,从而制成第二双面印刷电路板95,通过叠合,将该电路板95固定到绝缘基板92上,这样便获得了四层印刷电路板。
然而,到此为止,所述的公知技术存在以下问题。
首先,在上述已知的结构中,利用印刷工艺将导电浆料填充到通孔中,而该导电浆料中,导电物质的含量受到一定的限制。这种情况不利于减小导电浆料的电阻值,也不利用减小导电浆料与金属箔之间的电阻值,更准确地说,为了减小注入通孔内的导电浆料的电阻值,而增加导电浆料中导电物质的含量时,浆料的流动性会降低,从而使印刷性能降低,这样往往导致隆起,产生如注入不合格等缺陷。
因此,为了把导电浆料注满到小直径的通孔内,需要使导电浆料的流动性提高到一定的程度。为了上述目的,可增加浆料的流动性。就改善印刷性能来说,如果降低导电浆料内导电物质的含量,那么在这种情况下,却存在这样的缺点,即,由于减少了导电物质的含量,因而当导电浆料凝固后其电阻便增加了。
其次,在普通的结构中,往往有一定量的导电浆料85以膨胀或隆起高于绝缘基板82表面的状态残留下来,其残留量取决于薄层81的厚度,如图10(c)所示。在上述状态下,如果把第二铜箔86敷到绝缘基板82上,那么就没有使鼓起的导电浆料85排出的空间,并且在某些情况下,所述浆料渗入到第二铜箔86和绝缘基板82之间的空隙中,如图12(a)所示。如果上述绝缘基板82上的第二铜箔86被腐蚀形成第二电路图形87b.,那么渗入到第二铜箔86和绝缘基板82之间的导电浆料85便形成短路线85a,如图12(b)所示,这样会导致邻近的电路图形之间短路连接。
由于上述问题,因而在印刷电路的一般有机基板上,内连接通孔的数量和单位面积内可形成电路图形的密度受到限制,因此,在多层电路板上难以实现所期待的高密度安装。
因此,本发明的主要目的是提供一种用于印刷电路的有机基板的制造方法,该制造方法以高质量实现了高性能的印刷电路板。使得在内连接通孔中,导电浆料以及导电浆料和金属箔之间的连接电阻减小,同时使导电浆料保持一定的印刷性能,邻近内通孔之间存在的短接缺陷被消除,提供了由所说制造方法所制成的印刷电路有机基板,并且还获得了由所述有机基板构成的多层印刷电路板。
本发明的另一个目的是提供印刷电路有机基板的制造方法,以及由上述方法制造的有机基板,其结构简单,可靠性高,性能稳定,并且制造成本低。
为实现上述全部目的,根据本发明的一个最佳实施例,提供了一种制造印刷电路的有机基板的方法。该方法包括下列步骤:在多孔原材料基片上形成通孔,而多孔原材料基片上具有覆盖薄膜,并且具有压缩收缩性,它由非织物纤维和热固性树脂的复合材料构成;把导电浆料注入所述通孔;把覆盖薄膜从所述在其通孔内注满导电浆料的多孔原材料基片上去除;把金属箔粘敷到已去除所述覆盖薄膜的所述多孔原材料基片的表面上;并且通过加热和加压对上述粘敷了金属箔的多孔原材料基片进行热压,使其压缩。
如上所述,根据本发明,通过使用由非织物纤维和热固性树脂的复合材料所制成的多孔原材料基片,可容易地把导电物质含量较少的导电浆料注满通孔,并且印刷性能优良,同时由于在加工过程中导电浆料中部分粘合剂成分渗透到非织物纤维的多孔部位,所以该导电浆料中导电物质的组份比例增加了。
此外,通过使用具有压缩收缩性并且由非织物纤维和热固性树脂构成的多孔原材料基片,在热压多孔原材料基片的步骤中,也同时热压了导电浆料。这时,粘合剂成分被从导电物质之间挤出。因此,增强了导电物质之间以及导电物质和金属箔之间的粘结,有利于压实导电浆料内的导电物质。
进一步地,由于在通孔内注满导电浆料的粘合剂成分渗透到具有压缩性的多孔原材料基片中,所述可减少注入的量,并由此可消除这样的不利情况,即导电浆料进入多孔原材料和粘附到该多孔原材料基片两面的金属箔之间。从而防止了邻近电路图形之间的短接疵病。
下面参照附图,对最佳实施例进行描述,由此,本发明的所有目的和特征将会更加清楚。在附图中:
图1(a)至1(e)是截面剖视图,说明本发明的一个最佳实施例的印刷电路有机基板的制造方法;
图2是由图1(a)至1(e)的方法制成的印刷电路有机基板的局剖透视图;
图3(a)至3(f)是截面剖视图,说明本发明的第二实施例的印刷电路有机基板的制造方法;
图4(a)至4(f)是截面剖视图,说明本发明的第三实施例的印刷电路有机基板的制造方法;
图5是曲线图,表示多孔原材料基片所承受的压强、压缩率和厚度之间的关系;
图6也是曲线图,表示压缩率与填满在通孔内的导电浆料电阻之间的关系;
图7是本发明的印刷电路有机基板的局部剖视图;
图8(a)至8(i)是说明本发明的一个实施例的多层印刷电路板制造方法的局部截面剖视图;
图9是由图8(a)至8(i)的方法制成的多层印刷电路板的分解透视图;
图10(a)至10(e)是说明一般双面印刷电路板(已描述过)的制造方法的局部截面剖视图;
图11(a)至11(d)是说明一般多层印刷电路板的制造方法的局部截面剖视图;
图12(a)至12(b)是说明一般双面印刷电路板制造方法中存在问题的局部截面剖视图。
在叙述本发明前,要说明的是在全部附图中,用同一个参考数字标号表示同一个部分。
实施例1
现在参照附图,图1(a)至1(e)所示的是根据本发明的一个最佳实施例而制造刷电路有机基板的方法。该有机基板的结构如图2所示。
首先,如图1(a)所示,制备一个多孔基体或原材料基片2,其厚度为t1,在相对的两个表面上敷设由聚酯或类似材料制成的覆盖薄膜1。为了获得这样的多孔原材料基片2,例如把热固性环氧树脂渗透到由芳香聚酰胺纤维制成的非织物纤维中并且使其中具有小孔或空隙2a,这样制成复合材料的基本部件(以下称为芳酰胺环氧树脂片)。这里就芳酰胺环氧树脂片2来说,空隙2a的体积比为10~60%。然后如图1(6)所示,利用激光加工等工艺手段在芳酰胺环氧树脂片2的预定位置钻通孔3。然后象图1(c)所示的那样,在通孔3内注满导电浆料4。应该注意的是,导电浆料4由作为导电物质的银粉末和不溶于粘合剂的环氧树脂组成,并且将银粉末和粘合剂混合、搅拌而制成,银粉末的含量设定为85%(重量)。为了填注导电浆料4,把具有通孔3的芳酰胺环氧树脂片2放置在印刷机的工作台上(未示出),直接在覆盖薄膜1的上面印刷导电浆料4。在这种情况下,上表面的覆盖薄膜1起印刷掩模的作用,并且防止芳酰胺环氧树脂片2表面被弄脏。在这个过程中,导电浆料4中的部分粘合剂已经渗入到所述的芳酰胺环氧树脂片2内。并且在导电浆料4中,相对于粘合剂,导电物质的组份比例逐渐增加。接着,把芳酰胺环氧树脂片2两面的覆盖薄膜1去除。下一步如图1(d)所示,金属箔5如铜箔等被粘敷到芳酰胺环氧树脂片2的两面。在这种状态下,通过加热和加压来压缩芳酰胺环氧树脂片2,同时使芳酰胺环氧树脂片2和金属箔5相互粘合。这时,加热和加压的条件是:在30分钟内温度从室温升至200℃,同时在真空状态下施加压强为60kgf/cm2的压力,然后保温200℃,保温时间60分钟。然后在30分钟内使温度降至室温。经过上述步骤,导电浆料也被压紧。在该工艺过程中,粘合剂被从导电物质间压出,这样,使导电物质之间以及导电物质与金属箔之间的粘合得到加强,压实了导电浆料内的导电物质。同时芳酰胺环氧树脂片2的厚度被压缩至t2,并且使作为芳酰胺环氧树脂片2一种成分的环氧树脂和导电浆料4被固化或凝固。在上述情况下,导电浆料内的导电物质含量升至92.5%(重量)。
更具体地说,在本实施例中,当应用厚度t1为150至220μm,孔隙率(即所有孔隙2a的体积与多孔原材料体积之比)为10至60%的芳酰胺环氧树脂片作为芳酰胺环氧树脂片2时,通过热压工序后的厚度t2如图1(e)所示变成60至200μm,孔隙率减少至0~5%,孔隙2a的尺寸也变得更小。若芳酰胺环氧树脂片2的孔隙率低于10%,则导电浆料4的部分粘合剂渗入芳酰胺环氧树脂片2中的效果不明显,如果高于60%,则在有机基板内仍留有空隙。
实施例2
下面参照图3(a)至3(f),描述本发明的第二实施例的印刷电路有机基板的制造方法。
首先,如图3(a)所示,制备与第一实施例一样的芳酰胺环氧树脂片2,将其厚度设定为t3。然后如图3(b)所示,在100℃、12.5kgf/cm2的条件下热压3分钟,使芳酰胺环氧树脂片2预先被压编。这时芳酰胺环氧树脂片2被压缩至厚度t4,空隙2a的大小和孔隙率均减小。这样预压的目的是防止在下面工序中导电浆料4进入芳酰胺环氧树脂片2和金属箔5之间的界面,改善薄膜1和芳酰胺环氧树脂片2之间的粘合性,还为了控制导电浆料4中的粘合剂渗入芳酰胺环氧树脂片2中的量。然后如图3(c)所示,在芳酰胺环氧树脂片上的预定位置,用激光加工等工艺来钻通孔3′。再如图3(d)所示,把导电浆料4注满通孔3。为了填注导电浆料4,把具有通孔3的芳酰胺环氧树脂片2放置在印刷机的工作台上(未示出),直接在覆盖薄膜1上面印刷导电浆料。这时,上表面的覆盖薄膜1起印刷掩模作用。并且防止弄脏芳酰胺环氧树脂片2的表面。在该步骤中,导电浆料4中的部分粘合剂已经渗入到所述芳酰胺环氧树脂片2中,在导电浆料4内,相对于粘合剂来说,导电物质的组份比例逐渐增加。接着从芳酰胺环氧树脂片2的两面除去覆盖薄膜1。再如图3(e)所示,把金属箔5如铜箔等粘贴到芳酰胺环氧树脂片2的两面。在这种状态下,通过加热加压使芳酰胺环氧树脂片2被压缩,同时使芳酰胺环氧树脂片2和金属箔5互相粘合,如图3(f)所示。在上述情况下,加热和加压条件是:在30分钟内使温度从室温上升至200℃,同时在真空中加压,其压强为60kgf/cm2,然后在200℃的温度上保温60分钟,接着在30分钟内使温度降至室温。通过上述步骤,导电浆料也被压实,在这个过程中,粘合剂成分被从导电物质间挤出。这样,使导电物质之间以及导电物质与金属箔之间的粘结得到加强,压实了导电浆料内的导电物质。同时芳酰胺环氧树脂片2的厚度被压缩至t5,并且作为芳酰环氧树脂片2一种成分的环氧树脂和导电浆料4被固化或凝固。
更具体地说,在上述实施例中,当使用厚度t3为150至220μm、孔隙率为40至60%的芳酰胺环氧树脂片作为芳酰胺环氧树脂片2时,通过加热加压的预压缩步骤后的厚度t4变为100至150μm,如图3(b)所示。并且孔隙率减少至10~30%,空隙2a也变得较小。进而压缩工序后的厚度t5如图3(f)所示变成90至100μm,而且孔隙率减至0~5%,空隙2a的尺寸也变得更小。
实施例3
再参照图4(a)至4(f),下面将叙述本发明第三实施例的印刷电路有机基板的制造方法。
首先,如图4(a)所示,制备芳酰胺环氧树脂片2,其厚度为t6,该片2的至少一面有用聚酯或类似材料制成的覆盖薄膜1。就该芳酰胺环氧树脂片2来说,与第一实施例一样,采用具有空隙或小孔2a的芳酰胺环氧树脂片。接着如图4(b)所示,在芳酰胺环氧树脂片2的预定位置上用激光等加工工艺来钻通孔3。然后如图4(c)所示,将铜箔之类的第一金属箔5a敷盖到芳酰胺环氧树脂片2的下表面。应该注意的是,在多孔原材料基片的两面都有覆盖薄膜1的情况下,在除去下表面上的覆盖薄膜后才粘贴第一金属箔5a。接着如图4(d)所示,把导电浆料4注满到通孔3中。为了注入导电浆料4,把具有通孔3的芳酰胺环氧树脂片2放置在印刷机的工作台上(未示出),并且直接在覆盖薄膜1上面印刷导电浆料4。在这种情况下,上表面上的覆盖薄膜1起印刷掩模的作用,并且防止弄脏芳酰胺环氧树脂片的表面。在这个步骤中,导电浆料4中的部分粘合剂已渗入到所述芳酰胺环氧树脂片2中。并且在导电浆料4中,相对于粘合剂来说,导电物质的组份比例逐渐增加。接着将覆盖薄膜1从芳酰胺环氧树脂片2的上表面除去。然后如图4(e)所示,把第二金属箔5b如铜箔等粘贴到芳酰胺环氧树脂片2的上表面。在这种情况下,通过加热和加压使芳酰胺环氧树脂片2被压缩,同时使第一金属箔5a粘合到芳酰胺环氧树脂片2的下表面,使第二金属箔5b粘合到所述片2的上表面。在上述情况下,加热和加压的条件是:温度在30分钟内从室温上升至200℃,同时在真空条件下加压,其压强为60kgf/cm2,再在200℃中保温60分钟,然后在30分钟内降至室温。
通过上述步骤,导电浆料也被压实,在此期间,粘合剂成分被从导电物质间挤出。这样,加强了导电物质之间以及导电物质与金属箔之间的粘合,压实了导电浆料中的导电物质,同时芳酰胺环氧树脂片2的厚度被压缩成t7。并且作为芳酰胺环氧树脂片2一种成份的环氧树脂和导电浆料4被固化。
更具体地说,在上述实施例中,当使用厚度t6为150至220μm、孔隙率为10至60%的芳酰胺环氧树脂片作为芳酰胺环氧树脂片2时,在热压工序后,其厚度t7,如图4(f)所示,变为60至200μm,并且孔隙率减至0~5%,空隙2a的尺寸也变小。
应该注意的是,如图4(a)所示,芳酰胺环氧树脂片可以象前面所述的第二实施例一样,进行预压,使厚度和孔隙率减小。
就导电浆料4中的导电物质而言,在上面所述的第一、第二、和第三实施例中可以使用银、金、银钯合金、铜和一种以上的上述物质所组成的合金中选出的物质。另外导电物质颗粒的形状最好是球形,更准确地说,利用导电材料的球形金属颗粒,当导电浆料4受到压力时,粘合剂可容易地从金属颗粒的接触部分挤出。同时还由于金属颗粒的接触部分彼此容易产生塑性形变,所以金属颗粒之间以及金属颗粒与金属箔之间彼此容易紧密地结合。从而,使内通孔的连接电阻可大大降低。
同样,在第一、第二或第三实施例中,通过热压而使两层金属箔5之间的芳酰胺环氧树脂片2压缩的步骤可作如下改进,例如该步骤可分两步进行:第一步是提高导电浆料4的粘性,第二步是把金属箔5和芳酰胺环氧树脂片2粘合起来。在这种情况下,由于在第一步首先提高了导电浆料4的粘性,因而可有效地防止导电浆料4进入芳酰胺环氧树脂片2和金属箔5之间的界面。这将会产生良好的效果,特别是在布线密度高的印刷电路板内,通孔3之间的相互距离很短的情况下,这种潜在的效果会更加显著。
同时,在第一、第二或第三实施例中,设置导电浆料4的胶凝点,该点低于芳酰胺环氧树脂片成分之一的环氧树脂的软化温度。由于导电浆料4的凝结首先开始于热压在金属箔5之间的芳酰胺环氧树脂片2的步骤,并在粘性提高到一定程度后,引起作为片2的成份之一的环氧树脂变软,可阻止导电浆料4进入片2和金属箔5之间的界面这个不希望出现的现象产生。这将会产生良好的效果,特别是在布线密度高的印刷电路板内,通孔3之间的相互间距很短的情况下,这种潜在的效果会更加显著。
接着,下面将说明在第一、第二或第三实施例中至关重要的热压多孔原材料基片的情况。通过下面的公式来定义压缩率:
压缩率=(T-t)/T    ……(1)
其中T是热压前多孔原材料基片的厚度;t是热压后芳酰胺环氧树脂片2的厚度。
在图5中示出了当芳酰胺环氧树脂片2的厚度为200μm,多孔原材料基片的孔隙率为40%时,并且在100℃的条件下热压3分钟的情况下,多孔原材料基片所承受的压强、压缩率和厚度之间的关系曲线。
如图5所示,虽然多孔原材料的厚度随着所承受的压强的增加而减小,但当承受的压强超过压缩率临界点P时,厚度的变化量则会减小。把厚度的变化量代入公式(1)中便可求得压缩率。
因此,最好是在图5所示的压缩率临界点P之前的范围内,进行第二实施例中的图3(b)所示的预压步骤,并且在压缩率临界点P之后的范围内,进行图3(f)、1(c)和4(f)所示的热压步骤。
图6的曲线表示压缩率和注满通的导电浆料的电阻之间的关系,纵座标表示每一个通孔的电阻值。
图6所示曲线的测试试样的制作过程如下:
首先,把厚度为200μm的芳酰胺环氧树脂片作为多孔原材料基片,并且100℃、25kgf/cm2的条件下预压3分钟,用激光工艺在片上钻出直径为0.2mm的通孔;然后,把银粉作为金属颗粒,把非溶剂型环氧树脂作为粘合剂,把上述银粉分散到上述非溶剂型环氧树脂中,由此制成导电浆料,把该导电浆料注满每个通孔,把铜箔粘贴到芳酰胺环氧树脂片的两面,然后进行热压,其热压条件是;在30分钟内把温度从室温升至200℃,同时,在真空条件下施加压强为60kgf/cm2的压力,再以200℃的温度保温60分钟,接着在30分钟内降至室温。此后,腐蚀该片两面的铜箔,形成具有500个通孔串联连接的图形,通过测量电路图形的总电阻,计算出每个通孔的电阻值。
如图6所示,随着压缩率增加,电阻值急剧减少,当压缩率超过电阻值的临界点R时,电阻值的变化量很小,获得了稳定的电连接。
实施例4
下面再参照图7,叙述本发明的一个实施例的印刷电路有机基板。
如图7所示,在该实施例的印刷电路有机基板中,利用所述片2的通孔3中所填满的导电浆料,使芳酰胺环氧树脂片2的两面所粘贴的金属箔进行电连接。在所述的导电浆料4注入通孔3中以后,该导电浆料4中的导电物质的组份比例将逐渐增加。并且在粘结金属箔5后的热压步骤中,粘合剂成分被从导电物质之间挤出。这样,导电物质之间以及导电物质和金属箔之间的粘结得到加强。从而,在本实施例的导电浆料4中,其导电物质与通常的内通孔连接所使用的导电物质相比更加密实。
实施例5
下面参照图8(a)至8(i)叙述本发明的又一个实施例的多层印刷电路板的制造方法。
这里应该注意的是,图8(a)和8(b)表示制作第一电路层压片的工艺过程;图8(c)和8(d)表示制作第二电路层压片的工艺过程;图8(e)和8(g)表示制作中间连接片的工艺过程,该部分用于在第一和第二电路层压片叠合后实现第一和第二电路层压片之间相互连接;图8(h)和8(i)表示将第一和第二电路层压片叠合形成预定多层电路板的工艺过程,中间连接片夹在这两层电路层压片之间。图9表示由上述工艺过程制作的多层印刷电路板的分解透视图。
首先,如图8(a)所示,利用上述参照图1(a)至1(e)、图3(a)至3(f)或图4(a)至4(f)所描述的方法,制备第一印刷电路有机基板21。然后如图8(b)所示,利用普通的图形制作方法,腐蚀基板21两面的金属箔5,例如铜箔或其它金属箔、由此制成具有电路图形22的第一印刷电路层压片23。同样,如图8(c)和8(d)所示,加工第二印刷电路有机基板24制成具有电路图形25的第二印刷电路层压片26。应该注意的是,这里的印刷电路层压片23和26的每一片都可作为双面印刷电路板。
除了第一印刷电路层压片23和第二印刷电路层压片26的制造工序外,还要按图8(e)至8(g)所示的步骤制造中间连接片31。
首先,如图8(e)所示,制备带有覆盖薄膜27的芳酰胺环氧树脂片28,其厚度为T8,然后如图8(f)所示,用激光等加工工艺在芳酰胺环氧树脂片28上的预定位置钻出通孔29。然后如图8(g)所示,将导电浆料30注满通孔29内。为了注满导电浆料30,把具有通孔29的芳酰胺环氧树脂片28放置在印刷机的工作台上(未示出),直接在覆盖薄膜27上印刷导电浆料30。这时,上表面的覆盖薄膜27起印刷掩模的作用,而且防止弄脏芳酰胺环氧树脂片28的表面。在印刷导电浆料30后,除去覆盖薄膜27,从而制成了中间连接片31。应该在此注意的是,在图8(f)和8(g)的工序中,所形成的通孔29的数量应该与相互连接的两层电路图形所要求的数量相对应。
接着,在下面将描述利用中间连接片31叠合第一电路层压片23和第二电路层压片26的工序。
首先,如图8(h)所示,将带有第二电路层压片26的中间连接片31放置在第一电路层压片23上。然后,如图8(i)所示,通过加热和加压把第一电路层压片23和第二电路层压片26彼此叠压在一起。同时利用导电浆料4和30给电路图形22和25提供内通孔连接。在这个过程中,中间连接片31被压缩和固化,其厚度变为t9,同时,导电浆料也被固化。
更具体地说,在本实施例的中间连接片的制造工艺中,当使用厚度t8为150至220μm、孔隙率为10至60%的芳酰胺环氧树脂片作为芳酰胺环氧树脂片28时,通过热压工序后,其厚度t9,如图8(h)所示,变成60至200μm,并且孔隙率降至0至5%。
同时,为了制造层数更多的多层电路板,可以按照预定的要求制备预定数量的电路层压片和用于电路层压片之间内连接的中间连接片,在这些印刷电路层压片之间夹进中间连接片,然后加热加压使它们叠合。或通过重复图8(h)所示的工序,并重复热压步骤,把中间连接片和电路层压片一组接一组地叠压起来。
这里应该注意的是,多层电路板也可用通常的方法制造,即在电路层压片上叠合中间连接片,再在中间连接片上叠合其他金属箔,通过加热和加压把电路层压片、中间连接片和上述其他金属箔粘结起来,再腐蚀所说的上述其他金属箔以形成电路图形,或重复上述通常的方法。
到此为止所描述的多层印刷电路板的制造方法中,由于在中间连接片31的每个通孔29的下表面敞开的状态下,充分地注入导电浆料30,因此,可以在图8(g)所示的步骤后,把中间连接片31作为一个单独的部件,利用光学装置等,对该中间连接片31进行检查。所以,在图8(h)所示的步骤中,第一电路层压片23、第二电路层压片26和中间连接片31是在被检验过的情况下而叠合在一起的,从而可保持产品的高质量,遏止成本增加。反之,在多层电路板的一般制造工艺中,由于在电路层压片88上直接叠合形成相当于本实施例的中间连接片31的部分,如图11(a)至11(d)所示,如果在某个步骤中产生某些缺陷,那么合格的电路层压片88也必须一起废弃,这将会导致成本的增加。
此外,利用目前所述的本发明的制造方法所产生的多层电路板中,由于第一和第二电路层压片23、26之间利用通过热压形成的中间连接片31而彼此连接,并且导电浆料30中的导电物质被压实,同时导电物质和电路图形22、25之间的接触得到改善,所以内通孔连接的电阻明显减少。而把它应用到高密度或多层电路板中,并且该电路板的内连接孔很多时,上述作用将会更加显著。
通过上面的描述已经清楚,根据本发明,制造用于印刷电路板的有机基板的方法包括以下步骤;在带有覆盖薄膜和具有压缩收缩性的多孔原材料基片上钻通孔;将导电浆料注入到所述通孔内;把金属箔敷在已除去所述覆盖薄膜的所述多孔原材料基片的表面上;并且利用加热和加压,将敷有所述金属箔的所述多孔原材料基片压缩。用该方法制成的印刷电路有机基板具有高可靠性、低电阻的内连接通孔,本发明还涉及按上述方法制成的有机基板。
更具体地说,根据本发明,由于使用导电物质含量较少、并且印刷性能优良的浆料,因而能容易地把导电浆料注入通孔内。而且在制造过程中,导电浆料中的部分粘合剂成分渗入多孔原材料基片的孔隙内,使导电浆料中的导电物质组份比例增加,实现了低电阻的内通孔连接。
此外,在敷加金属箔后,对多孔原材料基片进行加热和加压的工序中,也把导电浆料和金属箔压实了。在这种情况下,导电物质之间的粘合剂成分被挤出,并且导电物质之间以及导电物质与金属箔之间的粘结被增强。借此,使导电浆料内的导电物质密实。
因此,根据本发明,可容易地制造其内连接通孔直径很小的高密度电路板;可容易地制造具有大量内连接通孔的多层电路板;可容易地制造有低电路阻抗要求的低噪声的电路板或高频电路板等。
虽然参照附图通过实施例对本发明作了充分地描述,但应该指出的是,在本发明基础上的各种变化和改型对本领域的普通技术人员来说将是显而易见的,因此,除非这种变化和改型脱离了本发明的范围,否则都应视为落在本发明的范围内。

Claims (4)

1.一种制造多层电路板的方法,其特征在于包括以下步骤:
通过在一基板相对两面上制作电路图形而制出电路板(23,26);
在一多孔原材料基片(28)上做出通孔(29)并将导电浆料(30)注入所述通孔(29),以此制出中间连接片(31);以及,
在所述中间连接片(31)上加上另外的金属箔之后将所述中间连接片(31)夹持在至少一对所述电路板(23,26)之间随后对其热压,或者将所述中间连接片(31)放在所述电路板(23,26)之一上随后对其热压,并对该另外的金属箔进行处理以形成电路图形,以此获得所需的多层电路板。
2.一种多层电路板,包括:
(a)多个绝缘层(2;28),各层都有一个或多个通孔(3),并有电路图形;
(b)固化的导电浆料(4),填充在所述通孔(3)中,所述绝缘层(2;28)相对两面上的电路图形电连接;其特征在于,
(c)所述绝缘层(2;28)由一多孔有机原材料基片通过与已填充在所述通孔(3)中的未固化导电浆料(4)一起加压和固化而制成。
3.根据权利要求2所述的多层电路板,其特征在于,所述多孔原材料基片由非织物纤维和热固性树脂构成。
4.根据权利要求3所述的多层电路板,其特征在于,所述非织物纤维为芳香聚酰胺系材料。
CNB991100387A 1992-05-06 1999-06-25 制造多层电路板的方法和用该方法制造的多层电路板 Expired - Lifetime CN1203731C (zh)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7121000B2 (en) 2001-07-02 2006-10-17 Nitto Denko Corporation Method for manufacturing multilayer wiring board
CN102762035A (zh) * 2011-04-27 2012-10-31 松下电器产业株式会社 配线基板的制造方法
US8686741B2 (en) 2008-05-28 2014-04-01 Advantest Corporation Excessive noise ratio deriving device, noise figure deriving device, method, program, and recording medium
CN107087355A (zh) * 2017-06-16 2017-08-22 东莞职业技术学院 一种采用丝网印刷技术实现pcb内层互联的方法

Families Citing this family (269)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3057924B2 (ja) * 1992-09-22 2000-07-04 松下電器産業株式会社 両面プリント基板およびその製造方法
US5766670A (en) * 1993-11-17 1998-06-16 Ibm Via fill compositions for direct attach of devices and methods for applying same
KR0179404B1 (ko) * 1993-02-02 1999-05-15 모리시타 요이찌 세라믹기판과 그 제조방법
ZA941671B (en) * 1993-03-11 1994-10-12 Csir Attaching an electronic circuit to a substrate.
CN1075338C (zh) * 1993-09-21 2001-11-21 松下电器产业株式会社 电路基板连接件及用其制造多层电路基板的方法
JP2587596B2 (ja) * 1993-09-21 1997-03-05 松下電器産業株式会社 回路基板接続材とそれを用いた多層回路基板の製造方法
CN1044762C (zh) 1993-09-22 1999-08-18 松下电器产业株式会社 印刷电路板及其制造方法
JP2587593B2 (ja) * 1993-09-22 1997-03-05 松下電器産業株式会社 プリント配線板及びその製造方法
US5652042A (en) * 1993-10-29 1997-07-29 Matsushita Electric Industrial Co., Ltd. Conductive paste compound for via hole filling, printed circuit board which uses the conductive paste
FR2713139B1 (fr) * 1993-12-03 1995-12-29 Loic Demeure Support métallisé à base de mousse organique, assemblage d'au moins deux de ces supports et procédé de fabrication de ce support.
US5834824A (en) 1994-02-08 1998-11-10 Prolinx Labs Corporation Use of conductive particles in a nonconductive body as an integrated circuit antifuse
US5813881A (en) 1994-02-08 1998-09-29 Prolinx Labs Corporation Programmable cable and cable adapter using fuses and antifuses
US5808351A (en) 1994-02-08 1998-09-15 Prolinx Labs Corporation Programmable/reprogramable structure using fuses and antifuses
US5917229A (en) 1994-02-08 1999-06-29 Prolinx Labs Corporation Programmable/reprogrammable printed circuit board using fuse and/or antifuse as interconnect
US5739476A (en) * 1994-10-05 1998-04-14 Namgung; Chung Multilayer printed circuit board laminated with unreinforced resin
US5962815A (en) 1995-01-18 1999-10-05 Prolinx Labs Corporation Antifuse interconnect between two conducting layers of a printed circuit board
JP3311899B2 (ja) * 1995-01-20 2002-08-05 松下電器産業株式会社 回路基板及びその製造方法
GB2297284B (en) * 1995-01-24 1997-09-10 Tdk Corp Fixing method and positioning tool
JP2874581B2 (ja) * 1995-02-15 1999-03-24 松下電器産業株式会社 回路基板の製造方法
US6484585B1 (en) 1995-02-28 2002-11-26 Rosemount Inc. Pressure sensor for a pressure transmitter
US5780143A (en) * 1995-03-01 1998-07-14 Tokuyama Corporation Circuit board
US5740603A (en) * 1995-07-31 1998-04-21 Samsung Electro-Mechanics Co., Ltd. Method for manufacturing low dielectric constant multiple layer ceramic circuit board
JPH09116273A (ja) * 1995-08-11 1997-05-02 Shinko Electric Ind Co Ltd 多層回路基板及びその製造方法
TW389780B (en) * 1995-09-13 2000-05-11 Hitachi Chemical Co Ltd Prepreg for printed circuit board
US5837356A (en) * 1995-09-22 1998-11-17 Kyocera Corporation Wiring board and method for manufacturing the same
US5906042A (en) 1995-10-04 1999-05-25 Prolinx Labs Corporation Method and structure to interconnect traces of two conductive layers in a printed circuit board
US5767575A (en) 1995-10-17 1998-06-16 Prolinx Labs Corporation Ball grid array structure and method for packaging an integrated circuit chip
EP0774888B1 (en) 1995-11-16 2003-03-19 Matsushita Electric Industrial Co., Ltd Printed wiring board and assembly of the same
KR100274333B1 (ko) * 1996-01-19 2001-01-15 모기 쥰이찌 도체층부착 이방성 도전시트 및 이를 사용한 배선기판
US5872338A (en) 1996-04-10 1999-02-16 Prolinx Labs Corporation Multilayer board having insulating isolation rings
JPH1051095A (ja) * 1996-05-24 1998-02-20 Hokuriku Electric Ind Co Ltd 回路基板及びその製造方法
JP3197213B2 (ja) * 1996-05-29 2001-08-13 松下電器産業株式会社 プリント配線板およびその製造方法
US5822856A (en) * 1996-06-28 1998-10-20 International Business Machines Corporation Manufacturing circuit board assemblies having filled vias
JP3241605B2 (ja) 1996-09-06 2001-12-25 松下電器産業株式会社 配線基板の製造方法並びに配線基板
US6703565B1 (en) 1996-09-06 2004-03-09 Matsushita Electric Industrial Co., Ltd. Printed wiring board
DE19637626A1 (de) * 1996-09-16 1998-03-26 Bosch Gmbh Robert Flexible Leiterbahnverbindung
DE69730629T2 (de) * 1996-12-26 2005-02-03 Matsushita Electric Industrial Co., Ltd., Kadoma Leiterplatte und Elektronikkomponente
US6286206B1 (en) 1997-02-25 2001-09-11 Chou H. Li Heat-resistant electronic systems and circuit boards
US5937514A (en) 1997-02-25 1999-08-17 Li; Chou H. Method of making a heat-resistant system
JPH10256687A (ja) * 1997-03-14 1998-09-25 Matsushita Electric Ind Co Ltd ビアホール充填用導体ペースト組成物とそれを用いたプリント配線基板
US6272745B1 (en) * 1997-03-14 2001-08-14 Photo Print Electronics Gmbh Methods for the production of printed circuit boards with through-platings
JP2937933B2 (ja) * 1997-03-24 1999-08-23 富山日本電気株式会社 多層プリント配線板の製造方法
JP3914606B2 (ja) * 1997-04-25 2007-05-16 松下電器産業株式会社 接着層の製造装置、両面基板の製造装置および多層基板の製造装置
JPH10321974A (ja) * 1997-05-22 1998-12-04 Matsushita Electric Ind Co Ltd 回路形成用基板
DE69839964D1 (de) * 1997-06-06 2008-10-16 Ibiden Co Ltd Einseitige leiterplatte und verfahren zu deren herstellung
TW410534B (en) 1997-07-16 2000-11-01 Matsushita Electric Ind Co Ltd Wiring board and production process for the same
US6525414B2 (en) 1997-09-16 2003-02-25 Matsushita Electric Industrial Co., Ltd. Semiconductor device including a wiring board and semiconductor elements mounted thereon
US6435883B1 (en) * 1997-09-24 2002-08-20 Raytheon Company High density multichip interconnect decal grid array with epoxy interconnects and transfer tape underfill
USRE40947E1 (en) 1997-10-14 2009-10-27 Ibiden Co., Ltd. Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole
US6222136B1 (en) * 1997-11-12 2001-04-24 International Business Machines Corporation Printed circuit board with continuous connective bumps
US6038133A (en) * 1997-11-25 2000-03-14 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module and method for producing the same
US6620731B1 (en) * 1997-12-18 2003-09-16 Micron Technology, Inc. Method for fabricating semiconductor components and interconnects with contacts on opposing sides
US6833613B1 (en) * 1997-12-18 2004-12-21 Micron Technology, Inc. Stacked semiconductor package having laser machined contacts
US6034427A (en) 1998-01-28 2000-03-07 Prolinx Labs Corporation Ball grid array structure and method for packaging an integrated circuit chip
US6281446B1 (en) 1998-02-16 2001-08-28 Matsushita Electric Industrial Co., Ltd. Multi-layered circuit board and method of manufacturing the same
US6119338A (en) * 1998-03-19 2000-09-19 Industrial Technology Research Institute Method for manufacturing high-density multilayer printed circuit boards
US6598291B2 (en) * 1998-03-20 2003-07-29 Viasystems, Inc. Via connector and method of making same
US6303881B1 (en) * 1998-03-20 2001-10-16 Viasystems, Inc. Via connector and method of making same
US6406939B1 (en) 1998-05-02 2002-06-18 Charles W. C. Lin Flip chip assembly with via interconnection
SG75841A1 (en) 1998-05-02 2000-10-24 Eriston Invest Pte Ltd Flip chip assembly with via interconnection
US6079100A (en) * 1998-05-12 2000-06-27 International Business Machines Corporation Method of making a printed circuit board having filled holes and fill member for use therewith
SG86345A1 (en) 1998-05-14 2002-02-19 Matsushita Electric Ind Co Ltd Circuit board and method of manufacturing the same
US6565954B2 (en) 1998-05-14 2003-05-20 Matsushita Electric Industrial Co., Ltd. Circuit board and method of manufacturing the same
US6047463A (en) 1998-06-12 2000-04-11 Intermedics Inc. Embedded trimmable resistors
US6976904B2 (en) * 1998-07-09 2005-12-20 Li Family Holdings, Ltd. Chemical mechanical polishing slurry
US6676492B2 (en) 1998-12-15 2004-01-13 Chou H. Li Chemical mechanical polishing
US6458017B1 (en) 1998-12-15 2002-10-01 Chou H. Li Planarizing method
US6009620A (en) * 1998-07-15 2000-01-04 International Business Machines Corporation Method of making a printed circuit board having filled holes
WO2000013190A1 (fr) 1998-08-28 2000-03-09 Matsushita Electric Industrial Co., Ltd. Colle electroconductrice, structure electroconductrice utilisant cette colle, piece electrique, module et carte a circuit, connexion electrique, fabrication de carte a circuit et de piece electronique ceramique
US6207259B1 (en) * 1998-11-02 2001-03-27 Kyocera Corporation Wiring board
KR100332970B1 (ko) * 1998-12-08 2002-09-17 주식회사 심텍 피씨비기판슬롯단자의블라인드비아홀및그형성방법
SG82591A1 (en) 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with solder via
SG82590A1 (en) 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with strips and via-fill
TW522536B (en) 1998-12-17 2003-03-01 Wen-Chiang Lin Bumpless flip chip assembly with strips-in-via and plating
JP3344363B2 (ja) 1999-05-18 2002-11-11 松下電器産業株式会社 マスクフィルムとその製造方法およびそれを用いた回路基板の製造方法
US6889433B1 (en) 1999-07-12 2005-05-10 Ibiden Co., Ltd. Method of manufacturing printed-circuit board
EP2111087B1 (en) * 1999-08-06 2011-01-19 Ibiden Co., Ltd. Multilayer printed wiring board
US20100044079A1 (en) * 1999-08-27 2010-02-25 Lex Kosowsky Metal Deposition
US7446030B2 (en) 1999-08-27 2008-11-04 Shocking Technologies, Inc. Methods for fabricating current-carrying structures using voltage switchable dielectric materials
AU6531600A (en) * 1999-08-27 2001-03-26 Lex Kosowsky Current carrying structure using voltage switchable dielectric material
US20100044080A1 (en) * 1999-08-27 2010-02-25 Lex Kosowsky Metal Deposition
US7695644B2 (en) * 1999-08-27 2010-04-13 Shocking Technologies, Inc. Device applications for voltage switchable dielectric material having high aspect ratio particles
US20080035370A1 (en) * 1999-08-27 2008-02-14 Lex Kosowsky Device applications for voltage switchable dielectric material having conductive or semi-conductive organic material
US7825491B2 (en) * 2005-11-22 2010-11-02 Shocking Technologies, Inc. Light-emitting device using voltage switchable dielectric material
JP4300687B2 (ja) 1999-10-28 2009-07-22 味の素株式会社 接着フィルムを用いた多層プリント配線板の製造法
US6525921B1 (en) 1999-11-12 2003-02-25 Matsushita Electric Industrial Co., Ltd Capacitor-mounted metal foil and a method for producing the same, and a circuit board and a method for producing the same
US6337037B1 (en) 1999-12-09 2002-01-08 Methode Electronics Inc. Printed wiring board conductive via hole filler having metal oxide reducing capability
CN1212049C (zh) * 1999-12-15 2005-07-20 松下电器产业株式会社 电路形成基板及电路形成基板的制造方法
TWI228956B (en) 1999-12-17 2005-03-01 Matsushita Electric Ind Co Ltd Cleaning apparatus for substrate material
US6538210B2 (en) 1999-12-20 2003-03-25 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module, radio device having the same, and method for producing the same
US6520020B1 (en) 2000-01-06 2003-02-18 Rosemount Inc. Method and apparatus for a direct bonded isolated pressure sensor
US6508129B1 (en) 2000-01-06 2003-01-21 Rosemount Inc. Pressure sensor capsule with improved isolation
US6561038B2 (en) 2000-01-06 2003-05-13 Rosemount Inc. Sensor with fluid isolation barrier
JP3620795B2 (ja) 2000-01-06 2005-02-16 ローズマウント インコーポレイテッド 超小型電気機械システム用電気的相互接続部の結晶粒成長
US6505516B1 (en) 2000-01-06 2003-01-14 Rosemount Inc. Capacitive pressure sensing with moving dielectric
JP3292194B2 (ja) 2000-02-01 2002-06-17 松下電器産業株式会社 印刷用版およびそれを用いた印刷方法
WO2001059023A1 (fr) * 2000-02-08 2001-08-16 Ajinomoto Co., Inc. Film adhesif et procede de production d'une carte imprimee multicouche
US6871396B2 (en) 2000-02-09 2005-03-29 Matsushita Electric Industrial Co., Ltd. Transfer material for wiring substrate
JP4348815B2 (ja) 2000-03-13 2009-10-21 パナソニック株式会社 プリント配線基板の製造方法
TW569424B (en) 2000-03-17 2004-01-01 Matsushita Electric Ind Co Ltd Module with embedded electric elements and the manufacturing method thereof
JP4147723B2 (ja) 2000-06-05 2008-09-10 松下電器産業株式会社 プリント配線板
CN1196388C (zh) 2000-06-08 2005-04-06 松下电器产业株式会社 材料的干燥方法及其装置和使用该装置的线路板的制造方法
US6753483B2 (en) 2000-06-14 2004-06-22 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method of manufacturing the same
JP3527694B2 (ja) * 2000-08-11 2004-05-17 新光電気工業株式会社 配線基板の製造方法
JP2002064270A (ja) 2000-08-17 2002-02-28 Matsushita Electric Ind Co Ltd 回路基板とその製造方法
JP3903701B2 (ja) * 2000-08-17 2007-04-11 松下電器産業株式会社 多層回路基板とその製造方法
US6518514B2 (en) 2000-08-21 2003-02-11 Matsushita Electric Industrial Co., Ltd. Circuit board and production of the same
US6402970B1 (en) 2000-08-22 2002-06-11 Charles W. C. Lin Method of making a support circuit for a semiconductor chip assembly
US6660626B1 (en) 2000-08-22 2003-12-09 Charles W. C. Lin Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint
US6551861B1 (en) 2000-08-22 2003-04-22 Charles W. C. Lin Method of making a semiconductor chip assembly by joining the chip to a support circuit with an adhesive
US6562657B1 (en) 2000-08-22 2003-05-13 Charles W. C. Lin Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint
US6350633B1 (en) 2000-08-22 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
US6562709B1 (en) 2000-08-22 2003-05-13 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
US6436734B1 (en) 2000-08-22 2002-08-20 Charles W. C. Lin Method of making a support circuit for a semiconductor chip assembly
US6403460B1 (en) 2000-08-22 2002-06-11 Charles W. C. Lin Method of making a semiconductor chip assembly
US6459046B1 (en) 2000-08-28 2002-10-01 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method for producing the same
JP2002094200A (ja) * 2000-09-18 2002-03-29 Matsushita Electric Ind Co Ltd 回路基板用電気絶縁材と回路基板およびその製造方法
US6931723B1 (en) * 2000-09-19 2005-08-23 International Business Machines Corporation Organic dielectric electronic interconnect structures and method for making
US6511865B1 (en) 2000-09-20 2003-01-28 Charles W. C. Lin Method for forming a ball bond connection joint on a conductive trace and conductive pad in a semiconductor chip assembly
US6350632B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with ball bond connection joint
US6350386B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Method of making a support circuit with a tapered through-hole for a semiconductor chip assembly
EP1194020A3 (en) 2000-09-27 2004-03-31 Matsushita Electric Industrial Co., Ltd. Resin board, manufacturing process for resin board, connection medium body, circuit board and manufacturing process for circuit board
US6448108B1 (en) 2000-10-02 2002-09-10 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US6544813B1 (en) 2000-10-02 2003-04-08 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US6440835B1 (en) 2000-10-13 2002-08-27 Charles W. C. Lin Method of connecting a conductive trace to a semiconductor chip
US6876072B1 (en) 2000-10-13 2005-04-05 Bridge Semiconductor Corporation Semiconductor chip assembly with chip in substrate cavity
US7094676B1 (en) 2000-10-13 2006-08-22 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal pillar
US7075186B1 (en) 2000-10-13 2006-07-11 Bridge Semiconductor Corporation Semiconductor chip assembly with interlocked contact terminal
US7129113B1 (en) 2000-10-13 2006-10-31 Bridge Semiconductor Corporation Method of making a three-dimensional stacked semiconductor package with a metal pillar in an encapsulant aperture
US6667229B1 (en) 2000-10-13 2003-12-23 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip
US7129575B1 (en) 2000-10-13 2006-10-31 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped metal pillar
US6984576B1 (en) 2000-10-13 2006-01-10 Bridge Semiconductor Corporation Method of connecting an additively and subtractively formed conductive trace and an insulative base to a semiconductor chip
US6548393B1 (en) 2000-10-13 2003-04-15 Charles W. C. Lin Semiconductor chip assembly with hardened connection joint
US6908788B1 (en) 2000-10-13 2005-06-21 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using a metal base
US7264991B1 (en) 2000-10-13 2007-09-04 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using conductive adhesive
US6673710B1 (en) 2000-10-13 2004-01-06 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip
US7262082B1 (en) 2000-10-13 2007-08-28 Bridge Semiconductor Corporation Method of making a three-dimensional stacked semiconductor package with a metal pillar and a conductive interconnect in an encapsulant aperture
US6949408B1 (en) 2000-10-13 2005-09-27 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps
US6699780B1 (en) 2000-10-13 2004-03-02 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using plasma undercut etching
US6872591B1 (en) 2000-10-13 2005-03-29 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with a conductive trace and a substrate
US6537851B1 (en) 2000-10-13 2003-03-25 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace to a semiconductor chip
US6492252B1 (en) 2000-10-13 2002-12-10 Bridge Semiconductor Corporation Method of connecting a bumped conductive trace to a semiconductor chip
US6740576B1 (en) 2000-10-13 2004-05-25 Bridge Semiconductor Corporation Method of making a contact terminal with a plated metal peripheral sidewall portion for a semiconductor chip assembly
US7190080B1 (en) 2000-10-13 2007-03-13 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal pillar
US6576493B1 (en) 2000-10-13 2003-06-10 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps
US7071089B1 (en) 2000-10-13 2006-07-04 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with a carved bumped terminal
US7319265B1 (en) 2000-10-13 2008-01-15 Bridge Semiconductor Corporation Semiconductor chip assembly with precision-formed metal pillar
US7414319B2 (en) 2000-10-13 2008-08-19 Bridge Semiconductor Corporation Semiconductor chip assembly with metal containment wall and solder terminal
US7009297B1 (en) 2000-10-13 2006-03-07 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal particle
US6576539B1 (en) 2000-10-13 2003-06-10 Charles W.C. Lin Semiconductor chip assembly with interlocked conductive trace
US7132741B1 (en) 2000-10-13 2006-11-07 Bridge Semiconductor Corporation Semiconductor chip assembly with carved bumped terminal
JP2002124763A (ja) 2000-10-16 2002-04-26 Matsushita Electric Ind Co Ltd 回路形成基板の製造方法、回路形成基板および回路形成基板用材料
TW532050B (en) 2000-11-09 2003-05-11 Matsushita Electric Ind Co Ltd Circuit board and method for manufacturing the same
JP3721982B2 (ja) 2000-12-04 2005-11-30 松下電器産業株式会社 回路形成基板の製造方法および回路形成基板の製造装置
US6930395B2 (en) 2000-12-05 2005-08-16 Matsushita Electric Industrial Co., Ltd. Circuit substrate having improved connection reliability and a method for manufacturing the same
US6444489B1 (en) 2000-12-15 2002-09-03 Charles W. C. Lin Semiconductor chip assembly with bumped molded substrate
JP3867523B2 (ja) * 2000-12-26 2007-01-10 株式会社デンソー プリント基板およびその製造方法
US6713688B2 (en) 2000-12-27 2004-03-30 Matsushita Electric Industrial Co., Ltd. Circuit board and its manufacture method
US6429527B1 (en) 2001-01-17 2002-08-06 International Business Corporation Method and article for filling apertures in a high performance electronic substrate
US6653170B1 (en) 2001-02-06 2003-11-25 Charles W. C. Lin Semiconductor chip assembly with elongated wire ball bonded to chip and electrolessly plated to support circuit
JP2002299814A (ja) * 2001-04-03 2002-10-11 Hitachi Chem Co Ltd 多層プリント配線板の製造方法
JP2002305377A (ja) * 2001-04-09 2002-10-18 Ibiden Co Ltd 多層プリント配線板
US7049929B1 (en) * 2001-05-01 2006-05-23 Tessera, Inc. Resistor process
JP2002329974A (ja) * 2001-05-01 2002-11-15 Nitto Denko Corp 配線基板及びその製造方法
JP2002337268A (ja) 2001-05-21 2002-11-27 Nitto Denko Corp 金属箔積層板及びその製造方法
CN1229002C (zh) * 2001-07-18 2005-11-23 松下电器产业株式会社 电路形成基板及电路形成基板的制造方法
TW540281B (en) * 2001-08-09 2003-07-01 Matsushita Electric Ind Co Ltd Manufacturing method of conductive paste material and manufacturing method of printing wiring base board
TW545092B (en) * 2001-10-25 2003-08-01 Matsushita Electric Ind Co Ltd Prepreg and circuit board and method for manufacturing the same
TW200302685A (en) 2002-01-23 2003-08-01 Matsushita Electric Ind Co Ltd Circuit component built-in module and method of manufacturing the same
US6946205B2 (en) 2002-04-25 2005-09-20 Matsushita Electric Industrial Co., Ltd. Wiring transfer sheet and method for producing the same, and wiring board and method for producing the same
US6848316B2 (en) * 2002-05-08 2005-02-01 Rosemount Inc. Pressure sensor assembly
EP1780034B1 (en) 2002-09-24 2008-09-10 Matsushita Electric Industrial Co., Ltd. Printing plate, printing board, and printing method for printed board
US7102522B2 (en) * 2002-12-24 2006-09-05 3M Innovative Properties Company Tamper-indicating radio frequency identification antenna and sticker, a radio frequency identification antenna, and methods of using the same
WO2004064465A1 (ja) 2003-01-14 2004-07-29 Matsushita Electric Industrial Co., Ltd. 回路基板およびその製造方法
US6816125B2 (en) * 2003-03-01 2004-11-09 3M Innovative Properties Company Forming electromagnetic communication circuit components using densified metal powder
US20040214006A1 (en) * 2003-04-25 2004-10-28 Matsushita Electric Industrial Co., Ltd. Member for a circuit board, method of manufacturing the same, and methods of manufacturing circuit boards
US7141874B2 (en) * 2003-05-14 2006-11-28 Matsushita Electric Industrial Co., Ltd. Electronic component packaging structure and method for producing the same
JP4254343B2 (ja) 2003-05-19 2009-04-15 パナソニック株式会社 回路形成基板の製造方法
TW200505304A (en) 2003-05-20 2005-02-01 Matsushita Electric Ind Co Ltd Multilayer circuit board and method for manufacturing the same
JP5045664B2 (ja) * 2003-10-10 2012-10-10 パナソニック株式会社 回路形成基板の製造方法
US7993983B1 (en) 2003-11-17 2011-08-09 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with chip and encapsulant grinding
US7425759B1 (en) 2003-11-20 2008-09-16 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal and filler
US7538415B1 (en) 2003-11-20 2009-05-26 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal, filler and insulative base
JP3972902B2 (ja) 2003-12-26 2007-09-05 松下電器産業株式会社 回路基板の製造方法および製造装置
JP3979391B2 (ja) 2004-01-26 2007-09-19 松下電器産業株式会社 回路形成基板の製造方法および回路形成基板の製造用材料
US7258549B2 (en) 2004-02-20 2007-08-21 Matsushita Electric Industrial Co., Ltd. Connection member and mount assembly and production method of the same
KR100755795B1 (ko) 2004-10-08 2007-09-05 마쯔시다덴기산교 가부시키가이샤 다층 회로 기판의 제조 방법
JP2006131429A (ja) * 2004-11-02 2006-05-25 Towa Corp 低密着性材料及び樹脂成形型
US7446419B1 (en) 2004-11-10 2008-11-04 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar of stacked metal balls
US7750483B1 (en) 2004-11-10 2010-07-06 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar and enlarged plated contact terminal
US7268421B1 (en) 2004-11-10 2007-09-11 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar that includes enlarged ball bond
JP4617941B2 (ja) 2005-03-17 2011-01-26 パナソニック株式会社 回路形成基板の製造方法
TWI275332B (en) * 2005-04-26 2007-03-01 Phoenix Prec Technology Corp Method for fabricating interlayer conducting structure of circuit board
EP1876199A4 (en) 2005-04-27 2009-09-02 Hitachi Chemical Co Ltd LAMINATED, PREIMPREGNATED PLATE, COMPOSITE COATED WITH METAL SHEET, CIRCUIT BOARD CONNECTION MATERIAL, MULTILAYER PRINTED CONNECTION CARD, AND METHODS OF MAKING THE SAME
JP4417294B2 (ja) * 2005-06-16 2010-02-17 パナソニック株式会社 プローブカード用部品内蔵基板とその製造方法
US7650694B2 (en) 2005-06-30 2010-01-26 Intel Corporation Method for forming multilayer substrate
EP1903840A4 (en) 2005-07-15 2013-05-01 Panasonic Corp CONDUCTOR PLATE, WELDING MATERIAL, COPPER-COATED LAMINATE AND MANUFACTURING PROCESS FOR A PCB
JP4971607B2 (ja) * 2005-08-18 2012-07-11 富士通コンポーネント株式会社 端子接続構造
US8119918B2 (en) 2005-09-14 2012-02-21 Nec Corporation Printed circuit board and semiconductor package
US7737368B2 (en) * 2005-09-30 2010-06-15 Sanyo Electric Co., Ltd. Circuit board and method of manufacturing circuit board
JP2007129180A (ja) * 2005-10-03 2007-05-24 Cmk Corp プリント配線板、多層プリント配線板及びその製造方法
TW200740334A (en) * 2005-10-20 2007-10-16 Matsushita Electric Ind Co Ltd Multilayer printed wiring board and its manufacturing method
US7923844B2 (en) 2005-11-22 2011-04-12 Shocking Technologies, Inc. Semiconductor devices including voltage switchable materials for over-voltage protection
US20100263200A1 (en) * 2005-11-22 2010-10-21 Lex Kosowsky Wireless communication device using voltage switchable dielectric material
CN101313637B (zh) 2005-12-12 2010-08-18 松下电器产业株式会社 用于制造电路基板的中间材以及使用其的电路基板的制造方法
JP2007227874A (ja) * 2006-01-30 2007-09-06 Fujitsu Ltd 薄膜キャパシタ及びその製造方法
JP4476226B2 (ja) * 2006-02-24 2010-06-09 三洋電機株式会社 回路基板および回路基板の製造方法
JP2007258682A (ja) * 2006-02-24 2007-10-04 Sanyo Electric Co Ltd フレキシブル基板
US20070218258A1 (en) * 2006-03-20 2007-09-20 3M Innovative Properties Company Articles and methods including patterned substrates formed from densified, adhered metal powders
US7523545B2 (en) * 2006-04-19 2009-04-28 Dynamic Details, Inc. Methods of manufacturing printed circuit boards with stacked micro vias
US20080032049A1 (en) * 2006-07-29 2008-02-07 Lex Kosowsky Voltage switchable dielectric material having high aspect ratio particles
US20080029405A1 (en) * 2006-07-29 2008-02-07 Lex Kosowsky Voltage switchable dielectric material having conductive or semi-conductive organic material
US7981325B2 (en) * 2006-07-29 2011-07-19 Shocking Technologies, Inc. Electronic device for voltage switchable dielectric material having high aspect ratio particles
EP2084748A4 (en) 2006-09-24 2011-09-28 Shocking Technologies Inc FORMULATIONS FOR A VOLTAGE-SWITCHABLE DIELECTRIC MATERIAL WITH A DEVICED VOLTAGE CONTACT BEHAVIOR AND METHOD OF MANUFACTURING THEREOF
JP4984121B2 (ja) * 2006-09-26 2012-07-25 パナソニック株式会社 プリント配線板の製造方法
US7494843B1 (en) 2006-12-26 2009-02-24 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with thermal conductor and encapsulant grinding
US7811863B1 (en) 2006-10-26 2010-10-12 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with metal pillar and encapsulant grinding and heat sink attachment
US20120119168A9 (en) * 2006-11-21 2012-05-17 Robert Fleming Voltage switchable dielectric materials with low band gap polymer binder or composite
US20080143519A1 (en) * 2006-12-19 2008-06-19 3M Innovative Properties Company Tamper-indicating radio frequency identification tag and methods of indicating tampering of a radio frequency identification tag
JP2010515281A (ja) * 2007-01-02 2010-05-06 オルメット サーキッツ、インコーポレイテッド 並列加工された回路および充填ビアから高密度の多層プリント配線基板を作成する方法
US8637151B2 (en) * 2007-02-14 2014-01-28 Sumitomo Bakelite Co., Ltd. Interlayer dielectric film with carrier material and multilayer printed circuit board therewith
JP2008205111A (ja) 2007-02-19 2008-09-04 Fujitsu Ltd 配線基板および半導体装置、配線基板の製造方法
CN101296566B (zh) * 2007-04-29 2011-06-22 鸿富锦精密工业(深圳)有限公司 电气元件载板及其制造方法
US7793236B2 (en) * 2007-06-13 2010-09-07 Shocking Technologies, Inc. System and method for including protective voltage switchable dielectric material in the design or simulation of substrate devices
US8253033B2 (en) 2007-09-03 2012-08-28 Panasonic Corporation Circuit board with connection layer with fillet
CN101466205B (zh) * 2007-12-19 2010-06-16 富葵精密组件(深圳)有限公司 电路板的制作方法
US8206614B2 (en) * 2008-01-18 2012-06-26 Shocking Technologies, Inc. Voltage switchable dielectric material having bonded particle constituents
US8203421B2 (en) * 2008-04-14 2012-06-19 Shocking Technologies, Inc. Substrate device or package using embedded layer of voltage switchable dielectric material in a vertical switching configuration
JP5092934B2 (ja) * 2008-06-26 2012-12-05 富士通オプティカルコンポーネンツ株式会社 一芯双方向光送受信器
CN101335374B (zh) * 2008-08-06 2012-04-25 厦门大学 电子标签天线过桥的连接方法
US20100047535A1 (en) * 2008-08-22 2010-02-25 Lex Kosowsky Core layer structure having voltage switchable dielectric material
US20100065785A1 (en) * 2008-09-17 2010-03-18 Lex Kosowsky Voltage switchable dielectric material containing boron compound
WO2010039902A2 (en) * 2008-09-30 2010-04-08 Shocking Technologies, Inc. Voltage switchable dielectric material containing conductive core shelled particles
US9208931B2 (en) * 2008-09-30 2015-12-08 Littelfuse, Inc. Voltage switchable dielectric material containing conductor-on-conductor core shelled particles
US8362871B2 (en) * 2008-11-05 2013-01-29 Shocking Technologies, Inc. Geometric and electric field considerations for including transient protective material in substrate devices
US9226391B2 (en) 2009-01-27 2015-12-29 Littelfuse, Inc. Substrates having voltage switchable dielectric materials
US8399773B2 (en) 2009-01-27 2013-03-19 Shocking Technologies, Inc. Substrates having voltage switchable dielectric materials
US8272123B2 (en) 2009-01-27 2012-09-25 Shocking Technologies, Inc. Substrates having voltage switchable dielectric materials
JP4816750B2 (ja) * 2009-03-13 2011-11-16 住友電気工業株式会社 プリント配線基板の接続方法
CN102550132A (zh) 2009-03-26 2012-07-04 肖克科技有限公司 具有电压可切换电介质材料的元件
JP5237170B2 (ja) 2009-03-30 2013-07-17 三菱重工業株式会社 複合材タンク、翼、および、複合材タンクの製造方法
DE102009015742B4 (de) * 2009-03-31 2013-09-05 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Elektrisch funktionales Mehrschichtfoliensystem und Verfahren zum Herstellen desselben
US20120138339A1 (en) * 2009-08-19 2012-06-07 Picodrill Sa Method of producing an electrically conducting via in a substrate
US9053844B2 (en) * 2009-09-09 2015-06-09 Littelfuse, Inc. Geometric configuration or alignment of protective material in a gap structure for electrical devices
CN102044600A (zh) * 2009-10-15 2011-05-04 展晶科技(深圳)有限公司 发光二极管封装结构及其制备方法
US20110198544A1 (en) * 2010-02-18 2011-08-18 Lex Kosowsky EMI Voltage Switchable Dielectric Materials Having Nanophase Materials
US9082622B2 (en) 2010-02-26 2015-07-14 Littelfuse, Inc. Circuit elements comprising ferroic materials
US9320135B2 (en) * 2010-02-26 2016-04-19 Littelfuse, Inc. Electric discharge protection for surface mounted and embedded components
US9224728B2 (en) * 2010-02-26 2015-12-29 Littelfuse, Inc. Embedded protection against spurious electrical events
US8020292B1 (en) * 2010-04-30 2011-09-20 Ddi Global Corp. Methods of manufacturing printed circuit boards
CN103098564B (zh) * 2010-07-20 2016-07-20 住友电气工业株式会社 多层印刷配线板及其制造方法
CN101969747B (zh) * 2010-10-15 2013-07-03 安徽四创电子股份有限公司 印制板加工合页夹定位方法
TWI456726B (zh) 2011-01-24 2014-10-11 Ind Tech Res Inst 內連線結構、具有該內連線結構的裝置與線路結構、及防護內連線結構電磁干擾(emi)的方法
US20130146817A1 (en) 2011-04-27 2013-06-13 Panasonic Corporation Reuse paste manufacturing method and reuse paste
EP2590488A4 (en) 2011-07-27 2013-10-23 Panasonic Corp METHOD FOR MANUFACTURING REUSABLE PULP, REUSABLE PULP AND METHOD FOR MANUFACTURING WIRING SUBSTRATE USING REUSABLE PULP
US8680959B2 (en) * 2012-05-09 2014-03-25 Hamilton Sundstrand Corporation Immersion cooled inductor apparatus
US9583453B2 (en) 2012-05-30 2017-02-28 Ormet Circuits, Inc. Semiconductor packaging containing sintering die-attach material
US9005330B2 (en) 2012-08-09 2015-04-14 Ormet Circuits, Inc. Electrically conductive compositions comprising non-eutectic solder alloys
RU2534024C1 (ru) * 2013-05-29 2014-11-27 Открытое акционерное общество "Российская корпорация ракетно-космического приборостроения и информационных системы" (ОАО "Российские космические системы") Способ изготовления многослойной печатной платы сверхплотного монтажа
US9117807B2 (en) * 2013-07-26 2015-08-25 Infineon Technologies Ag Integrated passives package, semiconductor module and method of manufacturing
JP2015050195A (ja) * 2013-08-29 2015-03-16 富士通株式会社 積層基板の製造方法
JP6214336B2 (ja) * 2013-10-24 2017-10-18 日東シンコー株式会社 絶縁シートの製造方法
TWI477209B (zh) * 2014-04-08 2015-03-11 Azotek Co Ltd 複合基板
US9818682B2 (en) * 2014-12-03 2017-11-14 International Business Machines Corporation Laminate substrates having radial cut metallic planes
US9666514B2 (en) * 2015-04-14 2017-05-30 Invensas Corporation High performance compliant substrate
EP3555978A1 (en) * 2016-12-19 2019-10-23 ABB Schweiz AG Multi-phase layered busbar for conducting electric energy wherein the layers are glued together, method of manufactoring the same and switchboard cabinet including such a busbar
JP6810617B2 (ja) * 2017-01-16 2021-01-06 富士通インターコネクトテクノロジーズ株式会社 回路基板、回路基板の製造方法及び電子装置
US20200178895A1 (en) * 2017-06-07 2020-06-11 Board Of Regents, The University Of Texas System Wireless, wearable, and soft biometric sensor
EP3736852A1 (en) 2019-05-07 2020-11-11 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Aligning component carrier structure with known-good sections and critical section with other component carrier with components and dummies

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2296898A1 (fr) * 1974-12-30 1976-07-30 Barda Jean Francis Procede et dispositif pour affichage sur ecran cathodique
FR2296988A1 (fr) * 1974-12-31 1976-07-30 Ibm France Perfectionnement aux procedes de fabrication d'un module de circuits multicouches en ceramique
JPS5438562A (en) * 1977-09-01 1979-03-23 Sharp Kk Method of providing conduction between both surfaces of bilateral printed wiring board
US4383363A (en) * 1977-09-01 1983-05-17 Sharp Kabushiki Kaisha Method of making a through-hole connector
JPS59175191A (ja) * 1983-03-24 1984-10-03 大日本印刷株式会社 プリント配線基板
JPS6063146A (ja) * 1983-09-17 1985-04-11 松下電工株式会社 電気用積層板
US4897301A (en) * 1985-01-23 1990-01-30 Toyo Boseki Kabushiki Kaisha Flexible sheet reinforced with poly(aromatic amide) non-woven fabric and use thereof
JPH0246061Y2 (zh) * 1986-03-17 1990-12-05
JPS6347991A (ja) * 1986-08-18 1988-02-29 古河電気工業株式会社 プリント回路基板の製造方法
JPS6437079A (en) * 1987-07-31 1989-02-07 Shin Kobe Electric Machinery Manufacture of through-hole printed wiring board
JPH0180974U (zh) * 1987-11-20 1989-05-30
JPH01237132A (ja) * 1988-03-18 1989-09-21 Sumitomo Bakelite Co Ltd 熱硬化性樹脂銅張積層板の製造方法
US5117069A (en) * 1988-03-28 1992-05-26 Prime Computer, Inc. Circuit board fabrication
JPH025029A (ja) * 1988-06-24 1990-01-09 Nec Corp 非線形光方向性結合器
JPH0752788B2 (ja) * 1988-12-28 1995-06-05 松下電器産業株式会社 プリント配線板の形成方法
JPH0341794A (ja) * 1989-07-10 1991-02-22 Casio Comput Co Ltd 両面回路基板の製造方法
US5035939A (en) * 1989-08-31 1991-07-30 David Sarnoff Research Center, Inc. Manufacture of printed circuit boards
US5047283A (en) * 1989-09-20 1991-09-10 Ppg Industries, Inc. Electrically conductive article
JPH03250648A (ja) * 1990-02-28 1991-11-08 Nec Corp 低誘電率多層回路基板

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7121000B2 (en) 2001-07-02 2006-10-17 Nitto Denko Corporation Method for manufacturing multilayer wiring board
US8686741B2 (en) 2008-05-28 2014-04-01 Advantest Corporation Excessive noise ratio deriving device, noise figure deriving device, method, program, and recording medium
CN102762035A (zh) * 2011-04-27 2012-10-31 松下电器产业株式会社 配线基板的制造方法
CN102762035B (zh) * 2011-04-27 2013-08-14 松下电器产业株式会社 配线基板的制造方法
CN107087355A (zh) * 2017-06-16 2017-08-22 东莞职业技术学院 一种采用丝网印刷技术实现pcb内层互联的方法

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US5346750A (en) 1994-09-13
CN1203731C (zh) 2005-05-25
CN1092240A (zh) 1994-09-14
KR930024548A (ko) 1993-12-22
DE69317145T2 (de) 1998-07-02
US5481795A (en) 1996-01-09
KR970005002B1 (ko) 1997-04-10
EP0568930A2 (en) 1993-11-10
EP0568930A3 (zh) 1994-04-06
JPH06268345A (ja) 1994-09-22
EP0568930B1 (en) 1998-03-04
CN1056490C (zh) 2000-09-13
DE69317145D1 (de) 1998-04-09

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