CN102436434A - I/O (input/output) interface design method - Google Patents

I/O (input/output) interface design method Download PDF

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Publication number
CN102436434A
CN102436434A CN2011103096021A CN201110309602A CN102436434A CN 102436434 A CN102436434 A CN 102436434A CN 2011103096021 A CN2011103096021 A CN 2011103096021A CN 201110309602 A CN201110309602 A CN 201110309602A CN 102436434 A CN102436434 A CN 102436434A
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CN
China
Prior art keywords
pin
interface
groups
design method
present
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
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CN2011103096021A
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Chinese (zh)
Inventor
李胜军
王希峰
谭鲁
申思
王勇欧
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Sang Fei Consumer Communications Co Ltd
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Shenzhen Sang Fei Consumer Communications Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Sang Fei Consumer Communications Co Ltd filed Critical Shenzhen Sang Fei Consumer Communications Co Ltd
Priority to CN2011103096021A priority Critical patent/CN102436434A/en
Publication of CN102436434A publication Critical patent/CN102436434A/en
Pending legal-status Critical Current

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Abstract

The invention discloses an I/O (input/output) interface design method. According to the method, an I/O interface comprises two groups of same PIN pins, the two groups of PIN pins are arranged in a single-row mode and a double-row mode, wherein the two groups of PIN pins are distributed in mirror symmetry when the PIN pins are arranged in a single-row mode; and when the PIN pins are arranged in a double-row mode, the two groups of PIN pins are distributed in central symmetry. Through implementing the technical scheme of the invention, the I/O interface design method disclosed by the invention has the following advantages that: through increasing the number of the PIN pins and changing the arrangement mode of the PIN pins, when the I/O interface is connected, the forward and backward directions of the I/O interface do not need to be distinguished, so that the operation of a user is more convenient, thereby enhancing the user experience.

Description

A kind of I/O Interface design method
Technical field
The present invention relates to field of mobile terminals, relate in particular to a kind of I/O Interface design method.
Background technology
At present; For mobile phone, the I/O interface that is occurred on the market mainly comprises two kinds Micro-USB interfaces and Mini-USB interfaces, and these two kinds of interfaces all are according to the narrow design of the wide side of a side; The user will distinguish its pros and cons when using these two kinds of interfaces; Like this, when connecting these two kinds of interfaces, can bring many troubles, be prone to cause the blind operation of user simultaneously to the user.
Summary of the invention
The technical matters that the present invention will solve is, makes troubles to the user and is prone to cause the defective of the blind operation of user to prior art, and a kind of simple to operate and the I/O Interface design method that promotes user's health check-up are provided.
The technical solution adopted for the present invention to solve the technical problems is: construct a kind of I/O Interface design method, said I/O interface comprises two groups of identical PIN pin, and the arrangement mode between two groups of PIN pin comprises single and double, wherein,
If during by single arrangement, said two groups of PIN pin are the mirror image symmetry;
If during by double arrangement, said two groups of PIN pin are centrosymmetric.
In I/O Interface design method of the present invention, said I/O interface is a USB interface.
In I/O Interface design method of the present invention; Every group of PIN pin comprises a PIN pin, the 2nd PIN pin, the 3rd PIN pin, the 4th PIN pin and the 5th PIN pin, and wherein, a PIN pin connects positive source; The 2nd PIN pin connects the negative pole of data line; The 3rd PIN pin connects the positive pole of data line, the 4th PIN pin ground wire or unsettled, and the 5th PIN pin connects signal ground.
In I/O Interface design method of the present invention, said I/O Application of Interface is in mobile phone.
The technical scheme of embodiment of the present invention has following beneficial effect: through quantity that increases the PIN pin and the arrangement mode that changes the PIN pin, when connecting the I/O interface, need not distinguish its both forward and reverse directions, make the user more convenient to operate, thereby promote user experience.
Description of drawings
To combine accompanying drawing and embodiment that the present invention is described further below, in the accompanying drawing:
Fig. 1 is the outside synoptic diagram of two groups of PIN pin of I/O interface of the present invention by single arrangement;
Fig. 2 is the schematic internal view of two groups of PIN pin of I/O interface of the present invention by single arrangement;
Fig. 3 is that two groups of PIN pin in the I/O interface of the present invention are by the synoptic diagram of double arrangement;
Fig. 4 is the schematic internal view of two groups of PIN pin of I/O interface of the present invention by double arrangement.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
The invention provides a kind of I/O Interface design method, said I/O interface comprises two groups of identical PIN pin, should be noted that; The PIN pin of prior art includes only one group, and the present invention has increased by one group of PIN pin, and the quantity of the PIN pin in these two groups of PIN pin is identical; Wherein, the quantity of PIN pin can be selected according to user's demand voluntarily, and the arrangement mode between two groups of PIN pin comprises single and double; Wherein
If during by single arrangement, said two groups of PIN pin are the mirror image symmetry;
If during by double arrangement, said two groups of PIN pin are centrosymmetric.
Preferably, said I/O interface is a USB interface.
Should be noted that in the present embodiment, if be that example specifically describes technical scheme of the present invention with the mobile phone; Those skilled in the art should understand; In other embodiment, but the also technical scheme of embodiment of the present invention of other mobile terminal device repeats no more at this.
What deserves to be mentioned is that the I/O interface of mobile phone mainly comprises two kinds Micro-USB interfaces and Mini-USB interfaces, the I/O interface with mobile phone is the technical scheme of example embodiment of the present invention below.
See also Fig. 1, Fig. 1 is the outside synoptic diagram of two groups of PIN pin of I/O interface of the present invention by single arrangement, and is as shown in Figure 1; Two groups of PIN pin are by single arrangement; Every group of PIN pin comprises a PIN pin, the 2nd PIN pin, the 3rd PIN pin, the 4th PIN pin and the 5th PIN pin, should be noted that for the USB interface of mobile phone; Every group of PIN pin comprises 5 PIN pin; PIN pin quantity for every group of PIN pin in the I/O interface of other mobile terminal devices can be selected according to user's demand voluntarily, and those skilled in the art should understand, and repeats no more here.
Please combine to consult Fig. 2, Fig. 2 is the schematic internal view of two groups of PIN pin of I/O interface of the present invention by single arrangement, and is as shown in Figure 2, in the present embodiment; Said two groups of PIN pin are the mirror image symmetry, and wherein, a PIN pin connects positive source, and the 2nd PIN pin connects the negative pole of data line; The 3rd PIN pin connects the positive pole of data line, the 4th PIN pin ground wire or unsettled, and the 5th PIN pin connects signal ground; In the application of reality, the user can be according to the attribute of each PIN pin of color judgment of connecting line, thereby confirms the annexation of each PIN pin; Those skilled in the art should understand, and repeats no more here, should be noted that; The technical scheme of embodiment of the present invention, the user need not distinguish its both forward and reverse directions when connecting the I/O interface.
See also Fig. 3; Fig. 3 is that two groups of PIN pin in the I/O interface of the present invention are by the synoptic diagram of double arrangement; As shown in Figure 3, two groups of PIN pin are by double arrangement, and every group of PIN pin comprises a PIN pin, the 2nd PIN pin, the 3rd PIN pin, the 4th PIN pin and the 5th PIN pin.
Please combine to consult Fig. 4, Fig. 4 is the schematic internal view of two groups of PIN pin of I/O interface of the present invention by double arrangement, and is as shown in Figure 2, in the present embodiment; Said two groups of PIN pin are centrosymmetric, and wherein, a PIN pin connects positive source, and the 2nd PIN pin connects the negative pole of data line; The 3rd PIN pin connects the positive pole of data line, the 4th PIN pin ground wire or unsettled, and the 5th PIN pin connects signal ground; In the application of reality, the user can be according to the attribute of each PIN pin of color judgment of connecting line, thereby confirms the annexation of each PIN pin; Those skilled in the art should understand, and repeats no more here, should be noted that; The technical scheme of embodiment of the present invention, the user need not distinguish its both forward and reverse directions when connecting the I/O interface.
Compared to prior art, through quantity that increases the PIN pin and the arrangement mode that changes the PIN pin, when connecting the I/O interface, need not distinguish its both forward and reverse directions, make the user more convenient to operate, thereby promote user experience.
The above is merely the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within the claim scope of the present invention.

Claims (4)

1. an I/O Interface design method is characterized in that, said I/O interface comprises two groups of identical PIN pin, and the arrangement mode between two groups of PIN pin comprises single and double, wherein,
If during by single arrangement, said two groups of PIN pin are the mirror image symmetry;
If during by double arrangement, said two groups of PIN pin are centrosymmetric.
2. I/O Interface design method according to claim 1 is characterized in that said I/O interface is a USB interface.
3. I/O Interface design method according to claim 2 is characterized in that, every group of PIN pin comprises a PIN pin, the 2nd PIN pin, the 3rd PIN pin, the 4th PIN pin and the 5th PIN pin; Wherein, The one PIN pin connects positive source, and the 2nd PIN pin connects the negative pole of data line, and the 3rd PIN pin connects the positive pole of data line; The 4th PIN pin ground wire or unsettled, the 5th PIN pin connects signal ground.
4. I/O Interface design method according to claim 3 is characterized in that said I/O Application of Interface is in mobile phone.
CN2011103096021A 2011-10-13 2011-10-13 I/O (input/output) interface design method Pending CN102436434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011103096021A CN102436434A (en) 2011-10-13 2011-10-13 I/O (input/output) interface design method

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Application Number Priority Date Filing Date Title
CN2011103096021A CN102436434A (en) 2011-10-13 2011-10-13 I/O (input/output) interface design method

Publications (1)

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CN102436434A true CN102436434A (en) 2012-05-02

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104767091A (en) * 2013-10-10 2015-07-08 诺基亚公司 Communication control pins in dual row connector
CN106461886A (en) * 2014-06-24 2017-02-22 索尼公司 Optical transmitter, optical receiver, optical cable and light transmission method
US10078362B2 (en) 2013-08-13 2018-09-18 Nokia Technologies Oy Power delivery information over data interface

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6338347A (en) * 1986-08-01 1988-02-18 Fujitsu Ltd Inversional switching system for signal line
CN2689335Y (en) * 2003-12-05 2005-03-30 联想(北京)有限公司 Positive and negative interface of computer
CN101369698A (en) * 2008-10-06 2009-02-18 浪潮电子信息产业股份有限公司 Method for preventing power supply short circuit and circuit board burning cause by inverse connection between symmetrical plates
CN101923387A (en) * 2009-06-16 2010-12-22 英业达股份有限公司 Computer system, computer mainframe and method for positive connection and reverse connection of connector

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6338347A (en) * 1986-08-01 1988-02-18 Fujitsu Ltd Inversional switching system for signal line
CN2689335Y (en) * 2003-12-05 2005-03-30 联想(北京)有限公司 Positive and negative interface of computer
CN101369698A (en) * 2008-10-06 2009-02-18 浪潮电子信息产业股份有限公司 Method for preventing power supply short circuit and circuit board burning cause by inverse connection between symmetrical plates
CN101923387A (en) * 2009-06-16 2010-12-22 英业达股份有限公司 Computer system, computer mainframe and method for positive connection and reverse connection of connector

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10078362B2 (en) 2013-08-13 2018-09-18 Nokia Technologies Oy Power delivery information over data interface
CN104767091A (en) * 2013-10-10 2015-07-08 诺基亚公司 Communication control pins in dual row connector
CN104767091B (en) * 2013-10-10 2017-08-01 诺基亚技术有限公司 Control on Communication pin in double connector
CN106461886A (en) * 2014-06-24 2017-02-22 索尼公司 Optical transmitter, optical receiver, optical cable and light transmission method
CN106461886B (en) * 2014-06-24 2019-03-15 索尼公司 Optics transmitter, optical receiver, optics cable and optical transmission method

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Application publication date: 20120502