CN101997008A - Pixel structure - Google Patents
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- CN101997008A CN101997008A CN2010102875071A CN201010287507A CN101997008A CN 101997008 A CN101997008 A CN 101997008A CN 2010102875071 A CN2010102875071 A CN 2010102875071A CN 201010287507 A CN201010287507 A CN 201010287507A CN 101997008 A CN101997008 A CN 101997008A
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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Abstract
The invention discloses a pixel structure which comprises a substrate, a scanning line, a data line group, an active component and a pixel electrode. The substrate is provided with a display area and a periphery area arranged beside the display area including at least one sub-pixel area; the scanning line is arranged on the substrate; the data line group is arranged on the substrate and positioned at one side edge of the sub-pixel area and is staggered with the scanning line to form at least one first staggering area, wherein the data line group comprises a first data line and a second data line, the first data line is mutually staggered with the second data line to form at least one second staggering area, and the first data line and the second data line are mutually electrically insulated; the active component is electrically connected with the scanning line, and electrically connected with the first data line or the second data line in the data line group; and the pixel electrode is arranged in the sub-pixel area and electrically connected with the active element.
Description
Technical field
The present invention relates to a kind of dot structure, and particularly relevant for a kind of dot structure that improves the vertical cross-talk (vertical cross-talk) of LCD.
Background technology
Generally speaking, the dot structure of LCD comprises scan line, data wire, active member and pixel electrode.In dot structure, it is big to be healed in the area design ground of pixel electrode, can promote the aperture opening ratio (aperture ratio) of LCD.Yet, when pixel electrode and data wire too near the time, (capacitance between pixel and data line Cpd) can become big to the stray capacitance between pixel electrode and the data wire.Thus, in the switch element down periods, the voltage of pixel electrode can be subjected to the influence of the signal that data wire transmits and so-called crosstalk effect (cross-talk) takes place, and then influences the display quality of LCD.
In addition, present large-sized LCD is used the drive form of row counter-rotating mostly.Be expert under the drive form of counter-rotating, to equate to make vertical cross-talk be zero for pixel electrode and the coupling capacitance of the holding wire that is positioned at the pixel electrode both sides (data wire) in theory.Wherein, the number that is positioned at the data wire of pixel electrode both sides all only has one, and every data wire is straight, and every neither intermeshing of data wire.But, in fact,, cause existing between each rete of dot structure side-play amount to a certain degree because can there be contraposition skew to a certain degree in the multiple tracks masking process of dot structure.To make that so the distance between the holding wire of pixel electrode and its both sides is different, so that the coupling capacitance between the holding wire of pixel electrode and its both sides and unequal.In other words, in fact still there is the problem of vertical cross-talk, and the display quality of LCD is affected.
Summary of the invention
The invention provides a kind of dot structure, it can improve the vertical cross-talk phenomenon of LCD.
The present invention proposes a kind of dot structure, and it comprises substrate, scan line, data line group, active member and pixel electrode.Substrate has the viewing area and is positioned at other surrounding zone, viewing area, and the viewing area comprises at least one sub-pixel area.Scan line is arranged on the substrate.Data line group is to be arranged on the substrate and only to be positioned at a wherein side of sub-pixel area and to be staggered to form at least one first ecotone with scan line, wherein data line group comprises first data wire and second data wire, and at least one second ecotone of first data wire and the interlaced formation of second data wire, and first data wire and second data wire are electrically insulated mutually.Active member and scan line electrically connect and electrically connect with first data wire or second data wire in the data line group.Pixel electrode is positioned at sub-pixel area and electrically connects with active member.
The present invention proposes a kind of dot structure in addition, and it comprises substrate, scan line, first data line group, second data line group, first active member, second active member, first pixel electrode and second pixel electrode.Substrate has the viewing area and is positioned at other surrounding zone, viewing area, and wherein the viewing area comprises a pixel region at least, and pixel region has first sub-pixel area and second sub-pixel area.Scan line is arranged on the substrate.First data line group is arranged on the substrate and is positioned at a wherein side of pixel region and is staggered to form at least one first ecotone with scan line, wherein first data line group comprises first data wire and interlaced formation at least the second ecotone of second data wire, and first data wire and second data wire are electrically insulated mutually.Second data line group is arranged on the substrate and is positioned at another side of pixel region and is staggered to form at least the three ecotone with scan line, wherein second data line group comprises the 3rd data wire and at least one the 4th ecotone of the interlaced formation of the 4th data wire, and the 3rd data wire and the 4th data wire are electrically insulated mutually.First active member and scan line electrically connect and electrically connect with first data wire or second data wire in first data line group.First pixel electrode is positioned at first sub-pixel area and electrically connects with first active member.Second active member and scan line electrically connect and electrically connect with the 3rd data wire or the 4th data wire in second data line group.Second pixel electrode is positioned at second sub-pixel area and electrically connects with second active member.
Based on above-mentioned, because the present invention is that data line group is set in a wherein side of sub-pixel area, data line group comprises first data wire and second data wire, and first data wire and second data wire are interlaced to form at least one ecotone.When first data wire and second data wire give the signal of opposed polarity respectively, just has the data wire of two kinds of opposed polarities in the single side of pixel electrode.Therefore, though dot structure cause because of process shifts between the data wire of pixel electrode and its both sides distance not simultaneously, pixel electrode just can be repealed by implication with the coupling capacitance that is positioned at the data wire of the same side, and reaches the purpose of the vertical cross-talk phenomenon of reduction.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended accompanying drawing to be described in detail below.
Description of drawings
Fig. 1 is the schematic top plan view of display floater according to an embodiment of the invention;
Fig. 2 A is the local schematic top plan view of pel array according to an embodiment of the invention;
Fig. 2 B is along the hatching A-A ' of Fig. 2 A and the generalized section of B-B ';
Fig. 3 to Figure 10 is the local schematic top plan view of the pel array of several embodiment according to the present invention.
Wherein, Reference numeral
100: substrate 102: viewing area
104: surrounding zone U: pixel region
P, P1, P2: inferior pixel region SL: scan line
DLS1, DLS2: data line group DL1～DL4: data wire
T, T1, T2: active member PE, PE1, PE2: pixel electrode
202,204,208,210,212,214,218,220: ecotone
206a～206e, 216a～216e, 250a～250c, 260a～260c: line segment
110,120: insulating barrier
Embodiment
Fig. 1 is the schematic top plan view of display floater according to an embodiment of the invention.Fig. 2 A is the local schematic top plan view of pel array according to an embodiment of the invention.Fig. 2 B is along the hatching A-A ' of Fig. 2 A and the generalized section of B-B '.Please refer to Fig. 1, Fig. 2 A and Fig. 2 B, pel array is that the dot structure by a plurality of arrayed is constituted, and each dot structure comprises substrate 100, scan line SL, data line group DLS1, active member T and pixel electrode PE.
More specifically, substrate 100 has viewing area 102 and is positioned at the surrounding zone 104 on 102 sides, viewing area, and viewing area 102 comprises at least one sub-pixel area P.Particularly, each the sub-pixel area P in the viewing area 102 of aforesaid substrate 100 is that correspondence is provided with a dot structure.In other words, can constitute the pel array of display floater by a plurality of dot structures that are arranged in the sub-pixel area P.The material of substrate 100 can be glass, quartz, organic polymer or light tight/reflecting material (for example: electric conducting material, metal, wafer, pottery or other material applicatory) or other material applicatory.If when using electric conducting material or metal, then on substrate 100, cover a layer insulating (not illustrating), to avoid short circuit problem.
Scan line SL is arranged on the substrate 100.Data line group DLS1 is a wherein side that is arranged on the substrate 100 and is positioned at sub-pixel area P.In the present embodiment, scan line SL and data line group DLS1 setting interlaced with each other.In other words, the bearing of trend of the bearing of trend of data line group DLS1 and scan line SL is not parallel, and preferably, the bearing of trend of data line group DLS1L is vertical with the bearing of trend of scan line SL.In addition, accompany insulating barrier 110 between scan line SL and the data line group DLS1, so that both are electrically insulated.In addition, data line group DLS1 top more is coated with another insulating barrier 120.Based on the consideration of conductivity, scan line SL and data line group DLS1 generally are to use metal material.But, the invention is not restricted to this, according to other embodiment, scan line SL and data line group DLS1 also can use other electric conducting materials (for example: the nitrogen oxide of the nitride of alloy, metal material, the oxide of metal material, metal material or other suitable material) or the stack of layers of metal material and other electric conducting material.
From the above, the staggered part of data line group DLS1 and scan line SL is first ecotone 202.In addition, data line group DLS1 comprises the first data wire DL1 and the second data wire DL2, and at least one second ecotone 204 of the first data wire DL1 and the interlaced formation of the second data wire DL2, and the first data wire DL1 and the second data wire DL2 are electrically insulated mutually.
In the embodiment of Fig. 2 A, the first data wire DL1 is a complete signal line, and the second data wire DL2 is by a plurality of line segment 206a, 206b, and 206c constitutes.Particularly, be arranged in second ecotone 204 the second data wire DL2 line segment 206b layer not with the first data wire DL1 that is arranged in second ecotone 204 layer be not different.In the present embodiment, the line segment 206a of the first data wire DL1 and the second data wire DL2,206c belongs to same rete.And the line segment 206b of the second data wire DL2 is positioned at the top of the first data wire DL1 and crosses over the first data wire DL1, and line segment 206b can be metal material or other electric conducting materials (for example: the nitrogen oxide of the nitride of alloy, metal material, the oxide of metal material, metal material or other suitable material) or the stack of layers of metal material and other electric conducting material.In addition, accompany insulating barrier 120 between the line segment 206b of the second data wire DL2 and the first data wire DL1, so that the first data wire DL1 and the second data wire DL2 are electrically insulated mutually.In addition, a plurality of line segment 206a of the second data wire DL2,206b can directly electrically connect between the 206c, or electrically connects by the contact hole (not illustrating) that is formed in the insulating barrier 120.
Active member T and scan line SL electrically connect and electrically connect with the first data wire DL1 or the second data wire DL2 among the data line group DLS1 (present embodiment be that example illustrates with active member T with second data wire DL2 electric connection).In addition, active member T can be bottom grid film transistor or top grid type thin-film transistor, and it comprises grid, source electrode and drain electrode.The grid of active member T and scan line SL electrically connect, and the source electrode and the second data wire DL2 electrically connect.Wherein, semi-conducting material in bottom grid film transistor or the top grid type thin-film transistor is the single or multiple lift structure, and it comprises amorphous silicon, polysilicon, microcrystal silicon, monocrystalline silicon, organic semiconducting materials, oxide semiconductor material (for example: indium-zinc oxide, indium germanium zinc oxide or other suitable material or above-mentioned combination) or other suitable material or contains alloy (dopant) in above-mentioned material or above-mentioned combination.
Pixel electrode PE is positioned at sub-pixel area P and electrically connects with active member T.Pixel electrode PE can be transparent pixels electrode, reflective pixel electrode or semi-penetration, semi-reflective pixel electrode.The material of transparent pixels electrode comprises metal oxide, for example is indium tin oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide or other suitable oxide or the above-mentioned stack of layers of the two at least.The material of reflective pixel electrode comprises the metal material with high reflectance.According to an embodiment, pixel electrode PE is formed in the top of insulating barrier 120, and electrically connects with the drain electrode of active member T by being formed on the contact hole (not illustrating) in the insulating barrier 120.
In addition, in the present embodiment, the polarity of the first data wire DL1 and the second data wire DL2 is inequality.More specifically, when when operating or driving above-mentioned dot structure, in same time zone (time period), signal on the first data wire DL1 is that the negative polarity (-) and the second data wire DL2 are positive polarity (+), or the signal on the first data wire DL1 is that the positive polarity (+) and the second data wire DL2 are negative polarity (-).First above-mentioned data wire DL1 and the polarity of the second data wire DL2 are for the common voltage in the display floater (Vcom).
In the above-described embodiments, at least one second ecotone 204 of the first data wire DL1 of the data line group DLS 1 of dot structure and the interlaced formation of the second data wire DL2, and the polarity of the first data wire DL1 and the second data wire DL2 is inequality.In other words, the single side of the dot structure of present embodiment just has the data wire of two kinds of opposed polarities.Therefore, when even above-mentioned dot structure causes the distance between the data wire of pixel electrode PE and side to be offset to some extent because of process shifts, pixel electrode PE just can repeal by implication with the coupling capacitance that is positioned at the data line group DLS1 (the first data wire DL1 and the second data wire DL2) of the same side, and reaches the purpose that reduces vertical cross-talk phenomenon.
Please continue A,, more comprise another data line group DLS2 in another side edge of sub-pixel area P according to another embodiment with reference to Fig. 2.The staggered part of data line group DLS2 and scan line SL is the 3rd ecotone 212.In addition, wherein said data line group DLS2 comprises the 3rd data wire DL3 and the 4th data wire DL4, and at least one the 4th ecotone 214 of the 3rd data wire DL3 and the interlaced formation of the 4th data wire DL4, and the 3rd data wire DL3 and the 4th data wire DL4 are electrically insulated mutually.
Similarly, in the embodiment of Fig. 2 A, the 3rd data wire DL3 is a complete signal line, and the 4th data wire DL4 is by a plurality of line segment 216a, 216b, and 216c constitutes.Particularly, be arranged in the 4th ecotone 214 the 4th data wire DL4 line segment 216b layer not with the 3rd data wire DL3 that is arranged in the 4th ecotone 214 layer be not different.In the present embodiment, the line segment 216a of the 3rd data wire DL3 and the 4th data wire DL4,216c belongs to same rete.And the line segment 216b of the 4th data wire DL4 is positioned at the top of the 3rd data wire DL3 and crosses over the 3rd data wire DL3.Similarly, accompany insulating barrier 120 between the line segment 216b of the 4th data wire DL4 and the 3rd data wire DL3, so that the 3rd data wire DL3 and the 4th data wire DL4 are electrically insulated mutually.In addition, a plurality of line segment 216a of the 4th data wire DL4,216b can directly electrically connect between the 216c, or electrically connects by the contact hole (not illustrating) that is formed in the insulating barrier 120.
In addition, in the present embodiment, the polarity of the 3rd data wire DL3 and the 4th data wire DL4 is inequality.More specifically, when when operating or driving above-mentioned dot structure, in same time zone (time period), signal on the 3rd data wire DL3 is that negative polarity (-) and the 4th data wire DL4 are positive polarity (+), or the signal on the 3rd data wire DL3 is that positive polarity (+) and the 4th data wire DL4 are negative polarity (-).The 3rd above-mentioned data wire DL3 and the polarity of the 4th data wire DL4 are for the common voltage in the display floater (Vcom).
From the above, in the dot structure of Fig. 2 A, side at pixel electrode PE is that data line group DLS1 (the first data wire DL1 and the second data wire DL2) is set, and is that data line group DLS2 (the 3rd data wire DL3 and the 4th data wire DL4) is set at the opposite side of pixel electrode PE.Because the polarity of the first data wire DL1 and the second data wire DL2 is inequality, and the polarity of the 3rd data wire DL3 and the 4th data wire DL4 is inequality.Therefore, even above-mentioned dot structure causes the data line group DLS1 of pixel electrode PE and dual-side because of process shifts, distance between the DLS2 is inequality, pixel electrode PE be positioned at the data line group DLS1 (the first data wire DL1 and the second data wire DL2) of both sides and the coupling capacitance of data line group DLS2 (the 3rd data wire DL3 and the 4th data wire DL4) can be repealed by implication, and reach the purpose that reduces vertical cross-talk phenomenon.
What deserves to be mentioned is, in the embodiment of above-mentioned Fig. 2 A, the line segment 206b of the second data wire DL2 is positioned at the top of the first data wire DL1 and crosses over the first data wire DL1, the line segment 216b of the 4th data wire DL4 is positioned at the top of the 3rd data wire DL3 and crosses over the 3rd data wire DL3, but, the invention is not restricted to this.According to other embodiment, the line segment 206b of the second data wire DL2 is positioned at the below of the first data wire DL1 and crosses the first data wire DL1, and the line segment 216b of the 4th data wire DL4 is positioned at the below of the 3rd data wire DL3 and crosses the 3rd data wire DL3.
Fig. 3 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Fig. 3 is similar to Fig. 2 A, therefore this with Fig. 2 A components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 3 and Fig. 2 A is that the line segment 206b of the second data wire DL2 not only is arranged in ecotone 204 and more extends to outside the ecotone 204.Similarly, the line segment 216b of the 4th data wire DL4 not only is arranged in ecotone 214 and more extends to outside the ecotone 214.In other words, in the embodiments of figure 3, the line segment 206a of the first data wire DL1 and the second data wire DL2, it is other that 206c belongs to same rete/layer, the line segment 206b of the second data wire DL2 belongs to another rete/layer not, it can be to be positioned at line segment 206a, the rete on the 206c and the first data wire DL1 or under rete.Similarly, the line segment 216a of the 3rd data wire DL3 and the 4th data wire DL4, it is other that 216c belongs to same rete/layer, the line segment 216b of the 4th data wire DL4 belongs to another rete/layer not, it can be to be positioned at line segment 216a, the rete on 216c and the 3rd data wire DL3 or under rete.
In the embodiment of above-mentioned Fig. 2 A and Fig. 3, only designing among each data line group DLS1, DLS2 has an ecotone.But, the invention is not restricted to this, according to other embodiment, can design a plurality of ecotones among data line group DLS1, the DLS2, detailed description is as follows.
Fig. 4 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Fig. 4 is similar to Fig. 3, therefore this with Fig. 3 components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 4 and Fig. 3 is to have two ecotones 204,208 between the first data wire DL1 and the second data wire DL2, and has two ecotones 214,218 between the 3rd data wire DL3 and the 4th data wire DL4.
Fig. 5 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Fig. 5 is similar to Fig. 3, therefore this with Fig. 3 components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 5 and Fig. 3 is to have more ecotones 204,208,210 between the first data wire DL1 and the second data wire DL2, and has more ecotones 214,218,220 between the 3rd data wire DL3 and the 4th data wire DL4.
In the embodiment of above-mentioned Fig. 2 A to Fig. 5, the wherein data wire among each data line group is made of a plurality of line segments by complete signal line and another data wire.But, the invention is not restricted to this.According to another embodiment of the present invention, two data in the data line group are made of a plurality of line segment, and are as described below.
Fig. 6 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Fig. 6 is similar to Fig. 3, therefore this with Fig. 3 components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 6 and Fig. 3 is that the first data wire DL1 comprises a plurality of line segment 250a, 250b, and 250c, and the second data wire DL2 comprises a plurality of line segment 206a, 206b, 206c.Particularly, be arranged in ecotone 204 the second data wire DL2 line segment 206b layer not with the line segment 250b of the first data wire DL1 that is arranged in ecotone 204 layer be not different.In more detail, the line segment 250a of the first data wire DL1, the line segment 206a of the 250c and the second data wire DL2,206c belong to same rete/layer not.The line segment 206b of the second data wire DL2 is the line segment 250b that is positioned at the line segment 250b top of the first data wire DL1 and strides across the first data wire DL1.Certainly, in other embodiments, the line segment 206b that also can be the second data wire DL2 is the line segment 250b that is positioned at the line segment 250b below of the first data wire DL1 and crosses the first data wire DL1.Similarly, the line segment 250a of the first data wire DL1,250b can directly electrically connect or pass through contact hole between the 250c and electrically connects.The line segment 206a of the second data wire DL2,206b can directly electrically connect or pass through contact hole between the 206c and electrically connects.
Similarly, in the embodiment of Fig. 6, the 3rd data wire DL3 comprises a plurality of line segment 260a, 260b, and 260c, the 4th data wire DL4 comprises a plurality of line segment 216a, 216b, 216c.Particularly, be arranged in ecotone 214 the 4th data wire DL4 line segment 216b layer not with the line segment 260b of the 3rd data wire DL3 that is arranged in ecotone 214 layer be not different.In more detail, the line segment 260a of the 3rd data wire DL3, the line segment 216a of 260c and the 4th data wire DL4,216c belong to same rete/layer not.The line segment 216b of the 4th data wire DL4 is the line segment 260b that is positioned at the line segment 260b top of the 3rd data wire DL3 and strides across the 3rd data wire DL3.Certainly, in other embodiments, the line segment 216b that also can be the 4th data wire DL4 is the line segment 260b that is positioned at the line segment 260b below of the 3rd data wire DL3 and crosses the 3rd data wire DL3.Similarly, the line segment 260a of the 3rd data wire DL3,260b can directly electrically connect or pass through contact hole between the 260c and electrically connects.The line segment 216a of the 4th data wire DL4,216b can directly electrically connect between the 216c or see through contact hole and electrically connect.
Fig. 7 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Fig. 7 is similar to Fig. 2 A, therefore this with Fig. 2 A components identical with identical symbolic representation, and no longer repeat to give unnecessary details.
Please refer to Fig. 7 and while with reference to Fig. 1, the dot structure of present embodiment comprises substrate 100, scan line SL, the first data line group DLS1, the second data line group DLS2, the first active member T1, the second active member T2, the first pixel electrode PE1 and the second pixel electrode PE2.
Scan line SL is arranged on the substrate 100.In the present embodiment, scan line SL is the centre that is positioned at pixel region U.Just, scan line SL is between the first sub-pixel area P1 and the second sub-pixel area P2.
The first data line group DLS1 is arranged on the substrate 100 and only is positioned at the wherein side of pixel region U.In more detail, the first data line group DLS1 is the limit, left side that is positioned at the first sub-pixel area P1 and the second sub-pixel area P2.In addition, the staggered part of the first data line group DLS1 and scan line SL is first ecotone 202.The first above-mentioned data line group DLS1 comprises interlaced formation second ecotone 204,208 of the first data wire DL1 and the second data wire DL2 and both, and the first data wire DL1 and the second data wire DL2 are electrically insulated mutually.
In the present embodiment, the first data wire DL1 is a complete signal line, and the second data wire DL2 is by a plurality of line segment 206a, 206b, and 206c, 206d, 206e constitutes.Particularly, be positioned at the line segment 206b of the second data wire DL2 in second ecotone 204,208, the layer of 206d is not different with the layer that is positioned at the first data wire DL1 in second ecotone 204,208.In the present embodiment, the line segment 206a of the first data wire DL1 and the second data wire DL2,206c, 206e belong to same rete.And the line segment 206b of the second data wire DL2,206d is positioned at the top of the first data wire DL1 and crosses over the first data wire DL1, and line segment 206b, 206d can be metal material or other electric conducting materials (for example: the nitrogen oxide of the nitride of alloy, metal material, the oxide of metal material, metal material or other suitable material) or the stack of layers of metal material and other electric conducting material.In addition, the line segment 206b of the second data wire DL2 accompanies insulating barrier between the 206d and the first data wire DL1, so that the first data wire DL1 and the second data wire DL2 are electrically insulated mutually.In addition, a plurality of line segment 206a of the second data wire DL2,206b, 206c, 206d can directly electrically connect between the 206e, or sees through contact hole and electrically connect.
The second data line group DLS2 is arranged on the substrate 100 and only is positioned at another side of pixel region U.In more detail, the second data line group DLS2 is the right edge that is positioned at the first sub-pixel area P1 and the second sub-pixel area P2.In addition, the staggered part of the second data line group DLS2 and scan line SL is the 3rd ecotone 212.The second data line group DLS2 comprises interlaced formation the 4th ecotone 214,218 of the 3rd data wire DL3 and the 4th data wire DL4 and both, and the 3rd data wire DL3 and the 4th data wire DL4 are electrically insulated mutually.
In the present embodiment, the 3rd data wire DL3 is a complete signal line, and the 4th data wire DL4 is by a plurality of line segment 216a, 216b, and 216c, 216d, 216e constitutes.Particularly, be arranged in the line segment 216b of the 4th data wire DL4 of the 4th ecotone 214, the other layer with the 3rd data wire DL3 that is arranged in the 4th ecotone 214 of the layer of 216d is not different.In the present embodiment, the line segment 216a of the 3rd data wire DL3 and the 4th data wire DL4,216c, 216e belong to same rete.And the line segment 216b of the 4th data wire DL4,216d is positioned at the top of the 3rd data wire DL3 and crosses over the 3rd data wire DL3.Similarly, the line segment 216b of the 4th data wire DL4 accompanies insulating barrier between 216d and the 3rd data wire DL3, so that the 3rd data wire DL3 and the 4th data wire DL4 are electrically insulated mutually.In addition, at described a plurality of line segment 216a of the 4th data wire DL4,216b, 216c, 216d can directly electrically connect between the 216e, or passes through contact hole and electrically connect.
The first active member T1 and scan line SL electrically connect and electrically connect with the first data wire DL1 or the second data wire DL2 among the first data line group DLS 1, and present embodiment is that the first active member T1 and the first data wire DL1 are example.The second active member T2 and scan line SL electrically connect and are electrical with the 3rd data wire DL3 or the 4th data wire DL4 among the second data line group DLS2, and present embodiment is that the second active member T2 and the 4th data wire DL4 are example.The first active member T1 and the second active member T2 can be bottom grid film transistor or top grid type thin-film transistor, and it comprises grid, source electrode and drain electrode respectively.The grid of the first active member T1 and scan line SL electric connection and source electrode and the first data wire DL 1 electrically connect.The grid of the second active member T2 and scan line SL electric connection and source electrode and the 4th data wire DL4 electrically connect.
The first pixel electrode PE1 is positioned at the first sub-pixel area P1 and electrically connects with the first active member T1.The second pixel electrode PE2 is positioned at the second sub-pixel area P2 and electrically connects with the second active member T2.The first pixel electrode PE1 and the second pixel electrode PE2 can be transparent pixels electrode, reflective pixel electrode or semi-penetration, semi-reflective pixel electrode.According to an embodiment, the first pixel electrode PE1 and the second pixel electrode PE2 electrically connect with the drain electrode of the first active member T1 and the drain electrode of the second active member T2 by contact hole (not illustrating).
In the present embodiment, the polarity of the first data wire DL1 and the second data wire DL2 is inequality.The polarity of the 3rd data wire DL3 and the 4th data wire DL4 is inequality.More specifically, when in the above-mentioned dot structure of operation/driving, in same time zone (time period), signal on the first data wire DL1 is that the negative polarity (-) and the second data wire DL2 are positive polarity (+), or the signal on the first data wire DL1 is that the positive polarity (+) and the second data wire DL2 are negative polarity (-).In addition, the signal on the 3rd data wire DL3 is that negative polarity (-) and the 4th data wire DL4 are positive polarity (+), or the signal on the 3rd data wire DL3 is that positive polarity (+) and the 4th data wire DL4 are negative polarity (-).The polarity of the first above-mentioned data wire DL1, the second data wire DL2, the 3rd data wire DL3 and the 4th data wire DL4 is for the common voltage in the display floater (Vcom).
In the above-described embodiments, side at pixel region U (the first sub-pixel area P1 and the second sub-pixel area P2) is that the first data line group DLS1 (the first data wire DL1 and the second data wire DL2) is set, and is that the second data line group DLS2 (the 3rd data wire DL3 and the 4th data wire DL4) is set at the opposite side of pixel region U (the first sub-pixel area P1 and the second sub-pixel area P2).Because the polarity of the first data wire DL1 and the second data wire DL2 is inequality, and the polarity of the 3rd data wire DL3 and the 4th data wire DL4 is inequality.Therefore, even above-mentioned dot structure causes pixel electrode PE1 because of process shifts, the data line group DLS1 of PE2 and dual-side, distance between the DLS2 is inequality, pixel electrode PE1, PE2 be positioned at the data line group DLS1 (the first data wire DL1 and the second data wire DL2) of both sides and the coupling capacitance of data line group DLS2 (the 3rd data wire DL3 and the 4th data wire DL4) can be repealed by implication, and reach the purpose that reduces vertical cross-talk phenomenon.
Fig. 8 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Fig. 8 is similar to Fig. 7, therefore this with Fig. 7 components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 8 and Fig. 7 is that the first data wire DL1 comprises a plurality of line segment 250a, 250b, and 250c, the second data wire DL2 comprises a plurality of line segment 206a, 206b, 206c.Particularly, be arranged in ecotone 204 the second data wire DL2 line segment 206b layer not with the line segment 250b of the first data wire DL1 that is arranged in ecotone 204 layer be not different.In more detail, the line segment 250a of the first data wire DL1, the line segment 206a of the 250c and the second data wire DL2,206c belong to same rete/layer not.The line segment 206b of the second data wire DL2 is positioned at the line segment 250b top of the first data wire DL1 and strides across the line segment 250b of the first data wire DL1.Certainly, in other embodiments, also can be that the line segment 206b of the second data wire DL2 is positioned at the line segment 250b below of the first data wire DL1 and crosses the line segment 250b of the first data wire DL1.Similarly, the line segment 250a of the first data wire DL1,250b can directly electrically connect or pass through contact hole between the 250c and electrically connects.The line segment 206a of the second data wire DL2,206b can directly electrically connect or pass through contact hole between the 206c and electrically connects.
Similarly, the 3rd data wire DL3 comprises a plurality of line segment 260a, 260b, and 260c, the 4th data wire DL4 comprises a plurality of line segment 216a, 216b, 216c.Particularly, be arranged in ecotone 214 the 4th data wire DL4 line segment 216b layer not with the line segment 260b of the 3rd data wire DL3 that is arranged in ecotone 214 layer be not different.In more detail, the line segment 260a of the 3rd data wire DL3, the line segment 216a of 260c and the 4th data wire DL4,216c belong to same rete/layer not.The line segment 216b of the 4th data wire DL4 is positioned at the line segment 260b top of the 3rd data wire DL3 and strides across the line segment 260b of the 3rd data wire DL3.Certainly, in other embodiments, also can be that the line segment 216b of the 4th data wire DL4 is positioned at the line segment 260b below of the 3rd data wire DL3 and crosses the line segment 260b of the 3rd data wire DL3.Similarly, the line segment 260a of the 3rd data wire DL3,260b can directly electrically connect or pass through contact hole between the 260c and electrically connects.The line segment 216a of the 4th data wire DL4,216b can directly electrically connect or pass through contact hole between the 216c and electrically connects.
Fig. 9 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Fig. 9 is similar to Fig. 7, therefore this with Fig. 7 components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 9 and Fig. 7 is that scan line SL is a side that is positioned at pixel region U, just scan line SL is a side that is positioned at the first sub-pixel area P1 and the second sub-pixel area P2, and the embodiment of Fig. 9 is to be that the bottom that is positioned at the first sub-pixel area P1 and the second sub-pixel area P2 is an example with scan line SL.In addition, between the first sub-pixel area P1 and the second sub-pixel area P2, has the space.Just, between the first sub-pixel area P1 and the second sub-pixel area P2, be not provided with data wire or other conducting wire parallel in fact with data wire.Preferably, below the space, be not provided with data wire or other conducting wire parallel in fact with data wire.In other embodiments, in order to increase capacitance or shaded effect, between the first sub-pixel area P1 and the second sub-pixel area P2, have common voltage line (common line) or floating electrode (floating electrode).
In the embodiment of Fig. 9, the first data line group DLS1 is arranged on the substrate 100 and is positioned at the wherein side of pixel region U.The second data line group DLS2 is arranged on the substrate 100 and is positioned at another side of pixel region U.In more detail, the first data line group DLS1 is the limit, left side that is positioned at the first sub-pixel area P1.The second data line group DLS2 is the right edge that is positioned at the second sub-pixel area P2.
In addition, the staggered part of the first data line group DLS1 and scan line SL is first ecotone 202.The staggered part of the second data line group DLS2 and scan line SL is the 3rd ecotone 212.The first above-mentioned data line group DLS1 comprises interlaced formation second ecotone 204,208 of the first data wire DL1 and the second data wire DL2 and both, and the first data wire DL1 and the second data wire DL2 are electrically insulated mutually.The second data line group DLS2 comprises interlaced formation the 4th ecotone 214,218 of the 3rd data wire DL3 and the 4th data wire DL4 and both, and the 3rd data wire DL3 and the 4th data wire DL4 are electrically insulated mutually.In addition, the first data wire DL1 is a complete signal line, and the second data wire DL2 is by a plurality of line segment 206a, 206b, and 206c, 206d, 206e constitutes.Particularly, be positioned at the line segment 206b of the second data wire DL2 in second ecotone 204,208, the layer of 206d is not different with the layer that is positioned at the first data wire DL1 in second ecotone 204,208.Moreover the 3rd data wire DL3 is a complete signal line, and the 4th data wire DL4 is by a plurality of line segment 216a, 216b, and 216c, 216d, 216e constitutes.Particularly, be arranged in the line segment 216b of the 4th data wire DL4 of the 4th ecotone 214, the other layer with the 3rd data wire DL3 that is arranged in the 4th ecotone 214 of the layer of 216d is not different.
Figure 10 is the local schematic top plan view of pel array according to an embodiment of the invention.The embodiment of Figure 10 is similar to Fig. 9, therefore this with Fig. 9 components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Figure 10 and Fig. 9 is that the first data wire DL1 comprises a plurality of line segment 250a, 250b, and 250c, the second data wire DL2 comprises a plurality of line segment 206a, 206b, 206c.Particularly, be arranged in ecotone 204 the second data wire DL2 line segment 206b layer not with the line segment 250b of the first data wire DL1 that is arranged in ecotone 204 layer be not different.Similarly, the 3rd data wire DL3 comprises a plurality of line segment 260a, 260b, and 260c, the 4th data wire DL4 comprises a plurality of line segment 216a, 216b, 216c.Particularly, be arranged in ecotone 214 the 4th data wire DL4 line segment 216b layer not with the line segment 260b of the 3rd data wire DL3 that is arranged in ecotone 214 layer be not different.
Moreover, the above embodiment of the present invention all can be quoted mutually, and can transport in all kinds of display floaters, for example: display panels, organic electroluminescence display panel, flexible type display panel, Electronic Paper or other suitable display floater or above-mentioned combination.
Because the present invention is that data line group is set in a side of sub-pixel area, and data line group comprises two interlaced data wires.When on two data wires, giving the signal of opposed polarity respectively, just has the data wire of two kinds of opposed polarities in the single side of pixel electrode.Therefore, though dot structure cause because of process shifts between the data wire of pixel electrode and its both sides distance not simultaneously, pixel electrode just can be repealed by implication with the coupling capacitance that is positioned at the data wire of the same side, and reaches the purpose of the vertical cross-talk phenomenon of reduction.
In addition, another embodiment of the present invention is to be respectively that two groups of data line group are set in the both sides of sub-pixel area, and each data line group comprises two interlaced data wires.When giving the signal of opposed polarity respectively on two data wires in each data line group, all has the data wire of two kinds of opposed polarities separately in the both sides of pixel electrode.Therefore, though dot structure cause because of process shifts between the data wire of pixel electrode and its both sides distance not simultaneously, pixel electrode can be repealed by implication with the coupling capacitance that is positioned at the data wire of both sides, and reaches the purpose that reduces vertical cross-talk phenomenon.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (17)
1. a dot structure is characterized in that, comprising:
One substrate has a viewing area and is positioned at an other surrounding zone, this viewing area, and wherein this viewing area comprises at least one sub-pixel area;
The one scan line is arranged on this substrate;
One data line group, be arranged on this substrate and be positioned at a wherein side of this sub-pixel area and be staggered to form at least one first ecotone with this scan line, wherein this data line group comprises one first data wire and one second data wire, this first data wire and at least one second ecotone of the interlaced formation of this second data wire, and this first data wire and this second data wire are electrically insulated mutually;
One active member, itself and this scan line electrically connect and electrically connect with this first data wire or this second data wire in this data line group; And
One pixel electrode is positioned at this sub-pixel area and electrically connects with this active member.
2. dot structure according to claim 1 is characterized in that, the polarity of this first data wire and this second data wire is inequality.
3. dot structure according to claim 1, it is characterized in that, this first data wire is a complete signal line, this second data wire comprises a plurality of line segments, wherein be arranged in this second ecotone this second data wire these line segments one of them layer not with this first data wire that is arranged in this second ecotone layer be not different.
4. dot structure according to claim 1, it is characterized in that, this first data wire comprises a plurality of first line segments, this second data wire comprises a plurality of second line segments, wherein be arranged in this second ecotone this second data wire these second line segments one of them layer not with these first line segments of this first data wire that is arranged in this second ecotone one of them layer be not different.
5. dot structure according to claim 1, it is characterized in that, more comprise another data line group, be arranged on this substrate and be positioned at another side of this sub-pixel area and be staggered to form at least one the 3rd ecotone with this scan line, wherein this another data line group comprises one the 3rd data wire and one the 4th data wire, and at least one the 4th ecotone of the 3rd data wire and the interlaced formation of the 4th data wire, and the 3rd data wire and the 4th data wire are electrically insulated mutually.
6. dot structure according to claim 5 is characterized in that, the 3rd data wire in this another data line group and the polarity of the 4th data wire are inequality.
7. dot structure according to claim 5, it is characterized in that, the 3rd data wire is a complete signal line, the 4th data wire comprises a plurality of line segments, wherein be arranged in the 4th ecotone the 4th data wire these line segments one of them layer not with the 3rd data wire that is arranged in the 4th ecotone layer be not different.
8. dot structure according to claim 5, it is characterized in that, the 3rd data wire comprises a plurality of first line segments, the 4th data wire comprises a plurality of second line segments, wherein be arranged in the 4th ecotone the 4th data wire these second line segments one of them layer not with these first line segments of the 3rd data wire that is arranged in the 4th ecotone one of them layer be not different.
9. a dot structure is characterized in that, comprising:
One substrate has a viewing area and is positioned at an other surrounding zone, this viewing area, and wherein this viewing area comprises at least one pixel region, and this pixel region has one first sub-pixel area and one second sub-pixel area;
The one scan line is arranged on this substrate;
One first data line group, be arranged on this substrate and be positioned at a wherein side of this pixel region and be staggered to form at least one first ecotone with this scan line, wherein this first data line group comprises one first data wire and at least one second ecotone of the interlaced formation of one second data wire, and this first data wire and this second data wire are electrically insulated mutually;
One second data line group, be arranged on this substrate and be positioned at another side of this pixel region and be staggered to form at least one the 3rd ecotone with this scan line, wherein this second data line group comprises one the 3rd data wire and at least one the 4th ecotone of the interlaced formation of one the 4th data wire, and the 3rd data wire and the 4th data wire are electrically insulated mutually;
One first active member, itself and this scan line electrically connect and electrically connect with this first data wire or this second data wire in this first data line group;
One first pixel electrode is positioned at this first sub-pixel area and electrically connects with this first active member;
One second active member, itself and this scan line electrically connect and electrically connect with the 3rd data wire or the 4th data wire in this second data line group; And
One second pixel electrode is positioned at this second sub-pixel area and electrically connects with this second active member.
10. dot structure according to claim 9 is characterized in that, this scan line is in the centre of this pixel region and between this first sub-pixel area and this second sub-pixel area.
11. dot structure according to claim 9 is characterized in that, this scan line is a side that is positioned at this pixel region.
12. dot structure according to claim 9 is characterized in that, this first data wire in this first data line group and the polarity of this second data wire are inequality.
13. dot structure according to claim 9 is characterized in that, the 3rd data wire in this second data line group and the polarity of the 4th data wire are inequality.
14. dot structure according to claim 9 is characterized in that, this first data wire is a complete signal line, and this second data wire comprises a plurality of line segments,
Wherein be arranged in this second ecotone this second data wire these line segments one of them layer not with this first data wire that is arranged in this second ecotone layer be not different.
15. dot structure according to claim 9, it is characterized in that, this first data wire comprises a plurality of first line segments, this second data wire comprises a plurality of second line segments, wherein be arranged in this second ecotone this second data wire these second line segments one of them layer not with these first line segments of this first data wire that is arranged in this second ecotone one of them layer be not different.
16. dot structure according to claim 9, it is characterized in that, the 3rd data wire is a complete signal line, the 4th data wire comprises a plurality of line segments, wherein be arranged in the 4th ecotone the 4th data wire these line segments one of them layer not with the 3rd data wire that is arranged in the 4th ecotone layer be not different.
17. dot structure according to claim 9, it is characterized in that, the 3rd data wire comprises a plurality of first line segments, the 4th data wire comprises a plurality of second line segments, wherein be arranged in the 4th ecotone the 4th data wire these second line segments one of them layer not with these first line segments of the 3rd data wire that is arranged in the 4th ecotone one of them layer be not different.
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| CN2010102875071A CN101997008B (en) | 2010-09-16 | 2010-09-16 | Pixel structure |
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| CN2010102875071A CN101997008B (en) | 2010-09-16 | 2010-09-16 | Pixel structure |
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| CN101997008B CN101997008B (en) | 2012-05-23 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105470265A (en) * | 2015-11-19 | 2016-04-06 | 友达光电股份有限公司 | Pixel unit and pixel array |
| CN106549023A (en) * | 2017-01-13 | 2017-03-29 | 上海天马微电子有限公司 | A kind of array base palte, display floater and display device |
| CN113936564A (en) * | 2021-10-09 | 2022-01-14 | 惠州华星光电显示有限公司 | Display panel and display terminal |
| WO2023035371A1 (en) * | 2021-09-08 | 2023-03-16 | 深圳市华星光电半导体显示技术有限公司 | Pixel array, display panel and display apparatus |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1637558A (en) * | 2003-12-29 | 2005-07-13 | Lg.菲利浦Lcd株式会社 | Substrate for a liquid crystal display |
| US20070064190A1 (en) * | 2005-09-12 | 2007-03-22 | Samsung Electronics Co., Ltd. | Liquid crystal display and method of fabricating the same |
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- 2010-09-16 CN CN2010102875071A patent/CN101997008B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1637558A (en) * | 2003-12-29 | 2005-07-13 | Lg.菲利浦Lcd株式会社 | Substrate for a liquid crystal display |
| US20070064190A1 (en) * | 2005-09-12 | 2007-03-22 | Samsung Electronics Co., Ltd. | Liquid crystal display and method of fabricating the same |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105470265A (en) * | 2015-11-19 | 2016-04-06 | 友达光电股份有限公司 | Pixel unit and pixel array |
| CN105470265B (en) * | 2015-11-19 | 2018-07-17 | 友达光电股份有限公司 | Pixel unit and pixel array |
| CN106549023A (en) * | 2017-01-13 | 2017-03-29 | 上海天马微电子有限公司 | A kind of array base palte, display floater and display device |
| WO2023035371A1 (en) * | 2021-09-08 | 2023-03-16 | 深圳市华星光电半导体显示技术有限公司 | Pixel array, display panel and display apparatus |
| CN113936564A (en) * | 2021-10-09 | 2022-01-14 | 惠州华星光电显示有限公司 | Display panel and display terminal |
| CN113936564B (en) * | 2021-10-09 | 2023-12-19 | 惠州华星光电显示有限公司 | Display panel and display terminal |
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| Publication number | Publication date |
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| CN101997008B (en) | 2012-05-23 |
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