CN101917597A - Quick-look system suitable for large-area high-bit depth grayscale remote sensing images - Google Patents
Quick-look system suitable for large-area high-bit depth grayscale remote sensing images Download PDFInfo
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Abstract
The invention relates to the technical fields of remote sensing, geographical information and global positioning, in particular to a quick-look system for large-area high-bit depth grayscale remote sensing images. The quick-look system comprises camera image receiving equipment, image preprocessing equipment, a PCIE image receiving card, a high-performance workstation, a PCIE image sending card, a high grayscale bit depth video image distributor, and a high grayscale bit depth special display, wherein the high-performance workstation operates CIDS image analysis processing software to perform processing such as modulation transfer function calculation, signal to noise ratio calculation and histogram calculation on the received image data, and outputs results to a local LCD display. The quick-look system can realize the processing and quick look of common camera images, and fills a technical blank that the undistorted large-area quick-look display of the large-area high-bit depth grayscale remote sensing images cannot be realized at home.
Description
Technical field
The present invention relates to remote sensing, geography information, global-positioning technology field, relate in particular to a kind of quick look system that is used for the high-order dark-grey rank of large format remote sensing images.
Background technology
The 3S technology is the general designation of remote sensing, GIS-Geographic Information System, global positioning system.The present invention is mainly used in the remote sensing field in the 3S field, and the undistorted demonstration of full width face of the high-order dark-grey rank of large format remote sensing satellite image is the research focus of this technical field.Wherein the most unmanageable have two kinds of situations: after receiving the remote sensing satellite image, realize that the nothing sampling full width face of the high-order dark digital picture of large format high-resolution shows; Realize the undistorted demonstration in high-order dark-grey rank of the high-order dark digital picture of large format high-resolution.
The collection of traditional remote sensing satellite image, demonstration is the scheme that adopts image pick-up card+high-performance workstation+common LCD display, wherein high-performance workstation is as master controller, realize that by the control image pick-up card satellite image obtains, with view data output to be convenient on the display observation, in general high performance work station can drive the display of 2 LCD, the maximum 1920*1080 that supports of LCD display resolution commonly used, maximum quantization is 8bits deeply, just the maximum that can observe simultaneously is 1920*2*1080 as several points, and the position is dark to be the 8bits GTG.
Development along with remote sensing space exploration technology, the remote sensing satellite image need possess characteristics such as large format and high radiometric resolution, promptly require the remote sensing satellite camera by multi-disc ccd sensor splicing focal plane, and the analog signal of each CCD pixel output is through 10bits even the dark quantification in 12bits position.How to break away from the dark display driver restriction in traditional computer bus 8bits position, splicing realizes the undistorted demonstration of large format of satellite image on the display of the dark-grey rank of a plurality of high positions, is remote sensing field urgent problem.
Summary of the invention
Technical problem at above-mentioned existence, the purpose of this invention is to provide a kind of quick look system that is used for the high-order dark-grey rank of large format remote sensing images, look scheme soon and develop the corresponding equipment of looking soon with the real-time of the high-order dark-grey rank of large format high-resolution image that is applied in the remote sensing technology field.
For achieving the above object, the present invention adopts following technical scheme:
The camera image receiving equipment is used to receive 8 tunnel camera image data, after the view data that receives is carried out multiple connection and handled, is transferred to the image pre-processing device based on Cameralink syntype passage in the mode of time-sharing multiplex;
The image pre-processing device, be used to receive the output signal of 1-4 platform camera image receiving equipment, thereby realize maximum simultaneously 32 tunnel the view data that receives, and be provided with according to the user data can be sampled, processing such as counter-rotating, grey scale change, the data parallel output after handling the most at last;
PCIE image receiving card is installed on the PCIE slot of high performance work station, is used to receive the view data that the image pre-processing device sends, and the PCIE bus by high-performance workstation with data-moving in the internal memory of work station;
High-performance workstation, operation CIDS image analysis processing software on it, after the view data that receives being carried out processing such as histogram calculation, the calculating of biography letter, snr computation, the result is outputed on the local LCD display, and the view data that will need simultaneously to show sends to PCIE image transmission card by the PCIE bus;
The PCIE image sends card, is installed on the PCIE slot of high performance work station, receives the view data to be shown that high-performance workstation sends by the PCIE bus, and data are transferred to the dark video image distributor in high gray position with parallel mode;
The video image distributor that the high gray position is dark is used to receive the PCIE image and sends the view data to be shown that card transmits, and these data are converted to the picture format of the dark dedicated display defined in high gray position, thereby drives the dark dedicated display in high gray position;
The dark dedicated display in high gray position.
Described camera image receiving equipment receives backboard by 8 camera image receiving cards and 1 camera image and forms;
Described camera image receiving card receives the parallel input signal of LVDS, BLVDS serial input signals and ECL serial input signals, and mainly also modular converter, level switch module, field programmable gate function FPGA constitute internal circuit by string;
Described camera image receives backboard and receives the data that 8 camera image receiving card transmission come simultaneously by 8 PCIE slots, and internal circuit mainly is made of field programmable gate function FPGA, Cameralink syntype output module.
String and modular converter in the described camera image receiving card mainly are made of the DS90CR218 chip, and level switch module mainly is made of MC100EP90, MAX9376 chip;
The field programmable gate function that described camera image receiving card, described camera image receive in the backboard all selects for use the FPGA device EP2GX60 of altera corp to constitute.
Described image pre-processing device internal circuit is made of 4 Cameralink syntype input interface modules, field programmable gate function FPGA, SDRAM cache module, usb interface modules;
Cameralink syntype input interface module mainly is made of the DS90CR288 chip, and the serial LVDS conversion of signals that is used for receiving is parallel LVTTL data-signal;
Usb interface module mainly is made of the CY7C68013 chip, is used to receive the control command that high-performance workstation sends by the USB2.0 port, and sends FPGA to;
The SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made of 8 SDRAM chip MT48LC32M16.
Described PCIE image receiving card, PCIE image send card by field programmable gate function FPGA, configurable input/output interface module, SDRAM cache module, and PCI-PCIE * 4 bridge modules constitute; Direct and the configurable input/output interface module of the IO port of field programmable gate function FPGA, SDRAM cache module, PCI-PCIE * 4 bridge modules are connected;
Described field programmable gate function FPGA selects the FPGA device EP2C70 of altera corp for use, by the exchanges data between the realization of constitutive logic circuit and SDRAM cache module, PCI-PCIE * 4 bridge modules and the configurable input/output interface module;
Described configurable input/output interface module is used for according to the configuration of module resistance input or output interface being set.
The CIDS image analysis processing software of moving in the described high-performance workstation comprises with lower module:
Device driver module is positioned at the operating system kernel layer, is used for the driving of PCIE image receiving card, PCIE image transmission card, disk array driving and image pre-processing device USB;
Data processing module is responsible for and the communication of device driver module and reception, transmission and the transfer of data of human-computer interaction module control command as the intermediate layer;
Human-computer interaction module is positioned at the superiors, is used for data and data analysis result are presented in multiple modes such as image, form, histogram and curves, receives operation response personnel's keyboard input and mouse action simultaneously.
The video image distributor that described high gray position is dark is made up of 1 video distributor image receiving sheet and 4 video distributor DVI drive plates;
Described video distributor image receiving sheet is used to receive the PCIE image and sends the view data that the card transmission comes, and transfers data to video distributor DVI drive plate;
Described video distributor DVI drive plate, the picture format output that view data is converted to the dark dedicated display defined in high gray position drives the dark dedicated display in high gray position.
Described video distributor image receiving sheet, constitute by field programmable gate function FPGA, parallel serial conversion module, wherein said field programmable gate function FPGA selects the device EP2C70 of altera corp for use, by 4 fifo modules of memory resource construction that call this chip internal, it is the LVDS parallel image signal of form that EP2C70 directly receives with the frame;
Described parallel serial conversion module mainly is made of the DS90CR217 chip, and the LVTTL parallel data that is used for EP2C70 is sent is converted to the BLVDS serial signal.
Described video distributor DVI drive plate is made of field programmable gate function FPGA, string and modular converter, SDRAM cache module, DVI driver module;
Wherein, described string and modular converter mainly are made of the DS90CR218 chip, and it is used for the BLVDS serial input signals is converted to parallel LVTTL signal; Described SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made of 12 SDRAM chip MT48LC32M16; Described field programmable gate function FPGA selects for use the FPGA device EP2C70 of altera corp to constitute; Described DVI driver module mainly is made up of chip TFP410.
The present invention has the following advantages and good effect:
Not only can realize the general camera treatment of picture and look soon, and fill up the domestic undistorted large format of the high-order dark-grey rank of large format remote sensing images of can't realizing and looked the technique for displaying blank soon.
Description of drawings
Fig. 1 is the quick look system structured flowchart of the high-order dark-grey rank of large format provided by the invention remote sensing images.
Fig. 2 is the internal structure block diagram of camera image receiving equipment among the present invention.
Fig. 3 is the schematic block circuit diagram of image pre-processing device among the present invention.
Fig. 4 is PCIE image receiving card among the present invention, the schematic block circuit diagram that sends card.
Fig. 5 is PCIE image receiving card among the present invention, the schematic block circuit diagram that sends configurable input/output interface module in the card.
Fig. 6 is the frame diagram of CIDS image analysis processing software in the high-performance workstation among the present invention.
Fig. 7 is the internal structure block diagram of the dark video image distributor in high gray position among the present invention.
Embodiment
The invention will be further described in conjunction with the accompanying drawings with specific embodiment below:
As shown in Figure 1, the quick look system of the high-order dark-grey rank of large format provided by the invention remote sensing images has two kinds of mode of operations: image live preview pattern and image reproducing roam mode, respectively the system configuration under two kinds of different working modes is described in detail below:
Under image live preview pattern, every camera image receiving equipment 101,102,103,104 maximum receptions of supporting the dark remote sensing image data of 8 road 12bits ash component level, after camera image receiving equipment 101,102,103,104 carries out the view data that receives multiple connection and handles, be transferred to image pre-processing device 105 in the mode of time-sharing multiplex based on Cameralink syntype passage; Every image pre-processing device 105 connects 4 camera image receiving equipments 101,102,103,104 at most, receive when promptly maximum is supported 32 road remote sensing image datas, the image pre-processing device 105 USB2.0 interface by standard and high-performance workstation 107 are mutually in succession, according to receive running parameter to view data sample, processing such as counter-rotating, grey scale change, and with the view data and the line output of area-of-interest; PCIE image receiving card 106 is installed on the PCIE slot of high-performance workstation 107, is used to receive the view data that image pre-processing device 105 sends, and the PCIE bus by high-performance workstation 107 with data-moving in the internal memory of work station; The CIDS image analysis processing software of operation independent development in the high-performance workstation 107, after view data is carried out statistical analysis, the user's interest data are sent to realize in the video memory of work station that local express looks demonstration, meanwhile identical data are sent to the PCIE image by the PCIE bus and send card 108 and look demonstration soon with what the large formats of realizing the remote sensing satellite image did not have a GTG distortion, raw image data and relevant treatment result also can store into by the RAID0 array control unit of high-performance workstation 107 in the local disk array in addition; The PCIE image sends and after card 108 is received view data to be shown by the PCIE bus interface data to be transferred to the dark video image distributor 109 in high gray position with parallel schema; The dark video image distributor in high gray position 109 is maximum to be driven when supporting the dark dedicated display in 4 high gray positions and shows, it is after receiving view data, data are converted to the picture format of dark dedicated display 110,111,112,113 defineds in high gray position, and the DVI-Digital by standard directly drives the dark dedicated display 110,111,112,113 in high gray position; In the present invention, the dark dedicated display 110,111,112,113 in high gray position adopts the dedicated display G33 of the 12bits GTG of EIZO company, it is maximum supports that resolution is 2048*1536, thereby the resolution that 4 G33 use to realize the 12bits GTG is simultaneously looked demonstration soon as what the full width face of the large format remote sensing images of 8192*1536 did not have a GTG distortion.
Under the image reproducing roam mode, the CIDS image analysis processing software of operation independent development in the high-performance workstation, the view data of reading and saving from the local disk array, send card 108 by the PCIE image and send to the dark video image distributor 109 in high gray position, thereby directly drive 4 dark dedicated display 110,111,112,113 in high gray position, the playback roaming shows the dark remote sensing images in large format high gray position.
Fig. 2 is the internal structure block diagram of camera image receiving equipment among the present invention, and the camera image receiving equipment receives backboard 210 by 8 camera image receiving cards (#1, #2, #3, #4, #5, #6, #7, #8) and 1 camera image and forms: camera image receiving card (#1, #2, #3, #4, #5, #6, #7, #8) is used to receive the view data of varying level form; The data that camera image reception backboard 210 is used for 8 camera image receiving cards are received are carried out data multiplexing, and export with Cameralink syntype standard.
Camera image receiving card (#1, #2, #3, #4, #5, #6, #7, #8) can receive the parallel input signal 201 of LVDS, BLVDS serial input signals 202 and ECL serial input signals 203, internal circuit is mainly by string and modular converter 204, level switch module 205, field programmable gate function FPGA206 constitutes.
Directly modular converter 204, level switch module 205 are connected the IO port of field programmable gate function FPGA206 with going here and there also, adopt hardware description language directly to construct logic glue and have realized the control of scale programmable logic device FPGA206 to string and modular converter 204.
String and modular converter 204 mainly are made of the DS90CR218 chip, and it is used for BLVDS serial input signals 202 is converted to parallel LVTTL signal.
Field programmable gate function 206 is selected the FPGA device EP2GX60 of altera corp for use, this device contains the configurable input/output port of rich functions (IO port), wherein a part of IO port is set to the LVTTL signal input port, is used for directly connecting the LVTTL signal of DS90CR218 output; Part IO port is set to the receiving port of high speed LVDS, is used for directly receiving the parallel input signal of LVDS; Can also directly call deserializer among the EP2GX60 by IPCORE in addition, be used to receive the ECL serial input signals that has been converted to the LVDS serial signal.After the EP2GX60 received signal data are transferred to camera image with Rapid IO agreement by PCIE interface 207 and receive backboard 210.
Camera image receives backboard 210 can receive the data that 8 camera image receiving cards (#1, #2, #3, #4, #5, #6, #7, #8) transmission comes simultaneously by 8 PCIE slots, and internal circuit mainly is made of field programmable gate function FPGA209, Cameralink syntype output module 211.
Field programmable gate function 209 is selected the FPGA device EP2GX60 of altera corp for use, receive the data that the transmission of 8 camera image receiving cards comes simultaneously and be cached in its inner fifo module by the Rapid IO receiver module that calls this chip internal, then under the control of output control module with data with time-multiplexed mode and line output.
Cameralink syntype output module 211 mainly is made of the DS90CR287 chip, and it is used for the parallel data that EP2GX60 sends is converted to the output of Cameralink syntype standard.
Fig. 3 is the schematic block circuit diagram of image pre-processing device among the present invention, the maximum support of image pre-processing device is connected with 4 camera image receiving equipments, and internal circuit is made of Cameralink syntype input interface module 301, Cameralink syntype input interface module 302, Cameralink syntype input interface module 303, Cameralink syntype input interface module 304, usb interface module 305, SDRAM cache module 306, field programmable gate function FPGA307.
The structure of Cameralink syntype input interface module 301,302,303,304 is identical, and it mainly is made of the DS90CR288 chip, and the serial LVDS conversion of signals that is used for receiving is parallel LVTTL data-signal.
Field programmable gate function FPGA307 selects the FPGA device EP2GX60 of altera corp equally for use, by the constitutive logic circuit, receive the data of 4 Cameralink syntype input channels simultaneously, and be cached in the SDRAM module 306, the control command that receives according to usb interface module 305 then from high-performance workstation 107, to view data sample, processing such as counter-rotating, grey scale change, with the user's interest data with parallel LVDS data format output.
Fig. 4 is PCIE image receiving card among the present invention, the schematic block circuit diagram that sends card.PCIE image receiving card is used to receive the view data that the image pre-processing device sends, and the PCIE bus by high-performance workstation with data-moving in the internal memory of work station.The PCIE image sends cartoon and crosses the view data to be shown that the PCIE bus receives high-performance workstation's transmission, and data are transferred to the dark video image distributor in high gray position with parallel mode.The circuit design of PCIE image receiving card, transmission card is in full accord, and by field programmable gate function FPGA401, configurable input/output interface module 402, SDRAM cache module 403, PCI-PCIEx4 bridge module 404 constitutes.
Direct and the configurable input/output interface module 402 of the IO port of field programmable gate function FPGA401, SDRAM cache module 403, PCI-PCIE * 4 bridge modules 404 are connected, and adopt hardware description language directly to construct logic glue and have realized the control of scale programmable logic device FPGA401 to SDRAM cache module 403, PCI-PCIEx4 bridge module 404.
Field programmable gate function FPGA401 selects the FPGA device EP2C70 of altera corp for use, by the exchanges data between the realization of constitutive logic circuit and SDRAM cache module 403, PCI-PCIEx4 bridge module 404 and the configurable input/output interface module 402.
Configurable input/output interface module 402 is used for according to the configuration of module resistance input or output interface being set.The FPGA device EP2C70 of altera corp contains a large amount of abundant LVDS transceivers, as Fig. 5 (a) (b) shown in, with a pair of difference pin AD2, AD3 is under different resistance configuration, present different input and output functions, be on duty when connecting the resistance R 1 in one 100 Europe between branch pin AD2, the AD3, difference pin AD2, AD3 are set to the LVDS input pin; Be on duty when connecting a π type resistance (R2=120 Europe, R3=170 Europe, R4=120 Europe) between branch pin AD2, the AD3, difference pin AD2, AD3 are set to the LVDS output pin.According to above-mentioned analysis, the circuit theory diagrams of configurable input/output interface module are shown in Fig. 5 (c), when R5=0 Europe, R6=100 Europe, during R7=0 Europe, configurable input/output interface module is set to the LVDS input interface module, and promptly this card is configured to PCIE image receiving card; When R5=120 Europe, R6=170 Europe, during R7=120 Europe, configurable input/output interface module is set to the LVDS output interface module, and promptly this card is configured to PCIE image transmission card.
PCI-PCIEx4 bridge module 404 mainly is made of the PCIX bridging chip PI7C9X130 of PTI company.When this card is operated in receiving mode following time, the PCI-PCIEx4 bridge module is used for FPGA is converted to the PCIEx4 protocol data with the data that the PCI agreement sends, and is transferred in the internal memory of high-performance workstation.When this card is operated in sending mode following time, the PCI-PCIEx4 bridge module is used for the data that high-performance workstation sends with the PCIEx4 agreement are converted to the data of PCI agreement, receives data by the PCI logic function module of constructing in the FPGA, and is exported.
Fig. 6 is software frame figure of the present invention, the software architecture that software of the present invention adopts layering, modularization and parallel processing with satisfy to mass data show at a high speed, the requirement of analyzing and processing.System software module mainly is divided into three layers: device drive layer, data analysis layer and man-machine interaction layer.Carried out good encapsulation with the functional module of interlayer in each module layer, coupling is low, and functional efficiency improves the property modification and can not have influence on other layer module in each layer.Simultaneously, software has favorable expansibility, increases function as need, then increases corresponding interface at the equivalent layer secondary module, can not impact to the whole software framework.
Device drive layer is positioned at the operating system kernel layer, is responsible for the driven management of four kinds of equipment among the present invention, is respectively PCIE image receiving card, PCIE image transmission card, disk array driving and image pre-processing device USB and drives.Wherein PCIE image receiving card is responsible for receiving the data of parallel input; The PCIE image sends card and is responsible for 4 12Bit display screens are needed the parallel dark video image distributor in high gray position that is sent to of data presented; Disk array drives control commands such as being responsible for sending disk array resets, reading and writing, and receives data from disk array; Image pre-processing device USB drive to be responsible for to the selection of image pre-processing device sendaisle, channel data side-play amount, data sampling rate and sample mode and control command such as to reset, begins and stop.
Data analysis layer is an intermediate layer, is responsible for and the communication of device drive layer and reception, transmission and the transfer of data of man-machine interaction layer control command.Its major function is: resolve PCIE image receiving card data format; Coding PCIE image sends the card data format; Resolve the combination data of magnetic disk array; The data of magnetic disk array management; Coding disk array control command and the dark video image distributor control command in high gray position; Each channel image splicing; Calculating such as modulation transfer function calculating, snr computation, histogram calculation, average, root mean square; Picture contrast enhancing etc.
The brightness that modulation transfer function calculates darkness that the brightness be meant light deducts light and light adds the ratio of the darkness of glazing; The snr computation of camera imaging is a signal and the ratio of the power spectrum of noise; Grey level histogram is the function of gray scale, the number of the pixel of every kind of gray scale in its expression camera imaging, every kind of frequency that gray scale occurs in the reflection image; Equal all pixel average gray values of value representation camera imaging; The result that root mean square extracts square root N gray values of pixel points quadratic sum after divided by N; The picture contrast enhancing promptly becomes more even to the distribution of gray value in the image on each gray scale.
The realization of above-mentioned technology contents is to well known to a person skilled in the art technological means, and those skilled in the art readily appreciate that how to programme according to its content and realize above-mentioned various calculating, do not repeat them here.
The man-machine interaction layer is positioned at the superiors, and main being responsible for presents data and data analysis result in multiple modes such as image, form, histogram and curves, responsible simultaneously reception operation response personnel's keyboard input and mouse action etc.Software provide image amplification, dwindle, multiple display mode such as automatic roaming when cutting, playback, support operations such as multichannel hot key, drag and drop.
Fig. 7 is the internal structure block diagram of the dark video image distributor in high gray position among the present invention, and the video image distributor is made up of 1 video distributor image receiving sheet 710 and 4 video distributor DVI drive plates (71,72,73,74); Video distributor image receiving sheet 710 is used to receive the PCIE image and sends the view data that the card transmission comes, and transfers data to video distributor DVI drive plate (71,72,73,74); Video distributor DVI drive plate (71,72,73,74) drives the dark dedicated display in high gray position with the picture format output that view data is converted to the dark dedicated display defined in high gray position.
Video distributor image receiving sheet 710 is made of field programmable gate function FPGA705, parallel serial conversion module 706,707,708,709.
Field programmable gate function FPGA705 selects the FPGA device EP2C70 of altera corp for use, by 4 fifo modules of memory resource construction that call this chip internal, (its resolution is 8192*1536 to the LVDS parallel image signal that the direct reception of EP2C70 is form with the frame, be that every frame has 1536 row, every row has 8192 pictures to count a little), and every capable picture signal segmentation is stored in 4 FIFO (the 1st picture number of the every row of first FIFO stored o'clock counted a little to the 2048th picture, the 2049th picture number of second every row of FIFO stored o'clock counted a little to the 4096th picture, the 4097th picture number of the 3rd the every row of FIFO stored o'clock counted a little to the 6144th picture, the 6145th picture number of the 4th the every row of FIFO stored o'clock counted a little to the 8192nd picture), after data line received, 4 FIFO reportedly were defeated by parallel-to-serial converter with 2048 numbers simultaneously.
Parallel serial conversion module 706,707,708,709 mainly is made of the DS90CR217 chip, and its LVTTL parallel data that is used for EP2C70 is sent is converted to the BLVDS serial signal.
Also modular converter 701, SDRAM cache module 702, field programmable gate function FPGA 703, DVI driver module constitute 704 to video distributor DVI drive plate (71,72,73,74) by string.
String and modular converter 701 mainly are made of the DS90CR218 chip, and it is used for the BLVDS serial input signals is converted to parallel LVTTL signal.
SDRAM cache module 702 is used for the view data that buffer memory receives, and it mainly is made of 12 SDRAM chip MT48LC32M16, and wherein per 4 MT48LC32M16 constitute a memory cell, altogether the cache module of a polling mechanism of 3 memory cell compositions.Because the refresh frame frequency of display graphics image is different on the received image data frame frequency of video distributor DVI drive plate and the dark dedicated display in high gray position, especially when received image data frame frequency less than the dark dedicated display in high gray position on during the refresh frame frequency of display graphics image, by using the cache module of polling mechanism, realize that the not frame losing of image shows.
Field programmable gate function FPGA 703 selects the FPGA device EP2C70 of altera corp for use, view data pattern of the input according to the dark dedicated display in high gray position that is adopted (that adopt in this example is the 12bits GTG display G33 of EIZO company), logical circuit by hardware description language internal build correspondence, received maximum quantization is converted to the view data of the required specific format of G33 display deeply for the view data of 12bits, exports with the LVTTL parallel data.
The dark dedicated display in high gray position adopts the 12bits GTG display G33 of EIZO company, and it has the characteristics on the high-order dark-grey rank of high-resolution, and a plurality of the use simultaneously can the undistorted display image of large format.
Embodiment
Suppose that certain remote sensing satellite camera is by 32 ccd sensor splicing focal planes, what ccd sensor was taked is the working method of linear array scanning, and the analog signal of each CCD pixel output is exported in the mode that LVDS is parallel through the dark quantification in 12bits position, and 6144 pictures of its every line output are counted a little.Suppose and on the dark dedicated display in high gray position, to observe the full reduced sketch map of 32 passages and the full width face figure of certain passage, now operate as follows: 32 tap outputs of remote sensing satellite camera are connected with 4 camera image receiving equipments respectively by cable, the output of image receiving apparatus is connected with the image pre-processing device by the Cameralink cable of standard, the image pre-processing device is under the order control of high-performance workstation, data to 32 passages are sampled, the thumbnail data of 32 passages and the full width face diagram data of certain passage are transferred to PCIE image receiving card by parallel cable, PCIE image receiving card with the data-moving that receives in the internal memory of high-performance workstation, the CIDS image analysis processing software of operation independent development in the high-performance workstation, the view data that receives is carried out histogram calculation, the biography letter calculates, after snr computation etc. are handled, the result is outputed on the local LCD display, and the view data that will need to show according to customer requirements simultaneously sends to PCIE image transmission card, RAID0 disk array recording image data of being made up of 6 hard disks in the high-performance workstation in addition and relevant treatment result by the PCIE bus.PCIE image transmission cartoon is crossed parallel cable the thumbnail data of 32 passages and the full width face diagram data of certain passage is transferred to the dark video image distributor in high gray position, the dark video image distributor in high gray position is converted to the data that receive the picture format of the dark dedicated display defined in high gray position, drive 4 dark dedicated display G33 in high gray position, thereby (resolution is 2048*1536 to be implemented in the thumbnail that shows 32 passages on the G33 display, the 12bits GTG quantizes), the full width face figure of certain passage of tiled display on three G33 displays (resolution is 6144*1536, and the 12bits GTG quantizes).
More than operation is an application note under the image live preview pattern, certainly the user can divide the dark dedicated display in high gray position as required flexibly, for example with the thumbnail that shows 32 passages on the G33 display, 1: 2 thumbnail of 2 passages of tiled display etc. on three G33 displays.In like manner can finish the operation of image reproducing roam mode.
Compare with existing other camera quick look systems, the present invention has following several respects characteristic:
Adopt the dark dedicated display G33 in 12bits high gray position of EIZO company, utilize field programmable gate function FPGA construction logic circuit directly it to be driven, realized that the GTG of the above GTG quantized image of 8bits is undistorted to look demonstration soon.
Directly drive many (1-4 platform) high-resolution 12bits high gray dark dedicated display G33 in position by the dark video image distributor in high gray position, realized the undistorted demonstration of large format high gray (ultimate resolution 8192*1536, the 12bits GTG quantizes) of region of interest area image.
Above-mentioned example is used for the present invention that explains, rather than limits the invention, and in the protection range of spirit of the present invention and claim, the present invention is made any modification and change, all falls into protection scope of the present invention.
Claims (9)
1. a quick look system that is used for the high-order dark-grey rank of large format remote sensing images is characterized in that, comprising:
The camera image receiving equipment is used to receive 8 tunnel camera image data, after the view data that receives is carried out multiple connection and handled, is transferred to the image pre-processing device based on Cameralink syntype passage in the mode of time-sharing multiplex;
The image pre-processing device, be used to receive the output signal of 1-4 platform camera image receiving equipment, thereby realize maximum simultaneously 32 tunnel the view data that receives, and be provided with according to the user data can be sampled, processing such as counter-rotating, grey scale change, the data parallel output after handling the most at last;
PCIE image receiving card is installed on the PCIE slot of high performance work station, is used to receive the view data that the image pre-processing device sends, and the PCIE bus by high-performance workstation with data-moving in the internal memory of work station;
High-performance workstation, operation CIDS image analysis processing software on it, after the view data that receives being carried out processing such as modulation transfer function calculating, snr computation, histogram calculation, the result is outputed on the local LCD display, and the view data that will need simultaneously to show sends to PCIE image transmission card by the PCIE bus;
The PCIE image sends card, is installed on the PCIE slot of high performance work station, receives the view data to be shown that high-performance workstation sends by the PCIE bus, and data are transferred to the dark video image distributor in high gray position with parallel mode;
The video image distributor that the high gray position is dark is used to receive the PCIE image and sends the view data to be shown that card transmits, and these data are converted to the picture format of the dark dedicated display defined in high gray position, thereby drives the dark dedicated display in high gray position;
The dark dedicated display in high gray position.
2. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Described camera image receiving equipment receives backboard by 8 camera image receiving cards and 1 camera image and forms;
Described camera image receiving card receives the parallel input signal of LVDS, BLVDS serial input signals and ECL serial input signals, and mainly also modular converter, level switch module, field programmable gate function FPGA constitute internal circuit by string;
Described camera image receives backboard and receives the data that 8 camera image receiving card transmission come simultaneously by 8 PCIE slots, and internal circuit mainly is made of field programmable gate function FPGA, Cameralink syntype output module.
3. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 2 is characterized in that:
String and modular converter in the described camera image receiving card mainly are made of the DS90CR218 chip, and level switch module mainly is made of MC100EP90, MAX9376 chip;
The field programmable gate function that described camera image receiving card, described camera image receive in the backboard all selects for use the FPGA device EP2GX60 of altera corp to constitute.
4. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Described image pre-processing device internal circuit is made of 4 Cameralink syntype input interface modules, field programmable gate function FPGA, SDRAM cache module, usb interface modules;
Cameralink syntype input interface module mainly is made of the DS90CR288 chip, and the serial LVDS conversion of signals that is used for receiving is parallel LVTTL data-signal;
Usb interface module mainly is made of the CY7C68013 chip, is used to receive the control command that high-performance workstation sends by the USB2.0 port, and sends FPGA to;
The SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made of 8 SDRAM chip MT48LC32M16.
5. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
Described PCIE image receiving card, PCIE image send card by field programmable gate function FPGA, configurable input/output interface module, SDRAM cache module, and PCI-PCIE * 4 bridge modules constitute; Direct and the configurable input/output interface module of the IO port of field programmable gate function FPGA, SDRAM cache module, PCI-PCIE * 4 bridge modules are connected;
Described field programmable gate function FPGA selects the FPGA device EP2C70 of altera corp for use, by the exchanges data between the realization of constitutive logic circuit and SDRAM cache module, PCI-PCIE * 4 bridge modules and the configurable input/output interface module;
Described configurable input/output interface module is used for according to the configuration of module resistance input or output interface being set.
6. according to each described quick look system that is used for the high-order dark-grey rank of large format remote sensing images among the claim 1-5, it is characterized in that:
The CIDS image analysis processing software of moving in the described high-performance workstation comprises with lower module:
Device driver module is positioned at the operating system kernel layer, is used for the driving of PCIE image receiving card, PCIE image transmission card, disk array driving and image pre-processing device USB;
Data processing module is responsible for and the communication of device driver module and reception, transmission and the transfer of data of human-computer interaction module control command as the intermediate layer;
Human-computer interaction module is positioned at the superiors, is used for data and data analysis result are presented in multiple modes such as image, form, histogram and curves, receives operation response personnel's keyboard input and mouse action simultaneously.
7. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 1 is characterized in that:
The video image distributor that described high gray position is dark is made up of 1 video distributor image receiving sheet and 4 video distributor DVI drive plates;
Described video distributor image receiving sheet is used to receive the PCIE image and sends the view data that the card transmission comes, and transfers data to video distributor DVI drive plate;
Described video distributor DVI drive plate, the picture format output that view data is converted to the dark dedicated display defined in high gray position drives the dark dedicated display in high gray position.
8. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 7 is characterized in that:
Described video distributor image receiving sheet, constitute by field programmable gate function FPGA, parallel serial conversion module, wherein said field programmable gate function FPGA selects the device EP2C70 of altera corp for use, by 4 fifo modules of memory resource construction that call this chip internal, it is the LVDS parallel image signal of form that EP2C70 directly receives with the frame;
Described parallel serial conversion module mainly is made of the DS90CR217 chip, and the LVTTL parallel data that is used for EP2C70 is sent is converted to the BLVDS serial signal.
9. the quick look system that is used for the high-order dark-grey rank of large format remote sensing images according to claim 7 is characterized in that:
Described video distributor DVI drive plate is made of field programmable gate function FPGA, string and modular converter, SDRAM cache module, DVI driver module;
Wherein, described string and modular converter mainly are made of the DS90CR218 chip, and it is used for the BLVDS serial input signals is converted to parallel LVTTL signal; Described SDRAM cache module is used for the view data that buffer memory receives, and it mainly is made of 12 SDRAM chip MT48LC32M16; Described field programmable gate function FPGA selects for use the FPGA device EP2C70 of altera corp to constitute; Described DVI driver module mainly is made up of chip TFP410.
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