CN100386623C - Digital ultrasonic flaw detector and method for DAC curve making and inward gate stretching - Google Patents
Digital ultrasonic flaw detector and method for DAC curve making and inward gate stretching Download PDFInfo
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- CN100386623C CN100386623C CNB031347843A CN03134784A CN100386623C CN 100386623 C CN100386623 C CN 100386623C CN B031347843 A CNB031347843 A CN B031347843A CN 03134784 A CN03134784 A CN 03134784A CN 100386623 C CN100386623 C CN 100386623C
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Abstract
The present invention discloses a digital ultrasonic flaw detector which comprises a probe, an ultrasonic emission circuit unit, an ultrasonic receiving circuit unit, a control circuit and a display, wherein a single chip micro-processing and control unit is arranged in the control circuit. The present invention is characterized in that the present invention is provided with a digital signal processor circuit unit which comprises a memory, a digital signal processor and a display circuit, an analogue-digital conversion circuit and a sampled data buffer circuit are connected between the digital signal processor circuit unit and the ultrasonic receiving circuit unit, wherein the output of the ultrasonic receiving circuit unit is connected with the digital signal processor through the analogue-digital conversion circuit and the sampled data buffer circuit; the digital signal processor is connected with the memory, and the digital signal processor and the memory are connected with the single chip micro-processing and control unit. The present invention has the advantages of effective flaw detection data reserve, small size, light weight and low power consumption; the detection, positioning, evaluation and diagnosis of various flaws can be rapidly carried in high precision and high resolution.
Description
Technical field
The present invention relates to the UT (Ultrasonic Testing) technology, especially a kind of digital ultrasonic flaw detector.
Background technology
Utilizing ultrasound wave to detect a flaw is a kind of flaw detection means of present nondestructive examination field widespread usage, is a kind of harmless and free of contamination method of detection.Its ultimate principle is when utilizing ultrasound wave to propagate in measured material, according to the acoustic properties that the defective of material is shown its defective to be surveyed in the influence of ultrasonic propagation.According to this principle, utilize ultrasound wave can measure crack, pore in the media such as various metals, nonmetal, compound substance, defect information such as be mingled with.Ultra-sonic defect detector is made up of the probe with piezoelectric chip, ultrasonic transmit circuit unit, ultrasound wave receiving circuit unit and control module.The instantaneous high pressure pulse that the ultrasound emission circuit unit is produced, piezoelectric chip in this probe and produce ultrasound transmit signal, this ultrasonic emitting signal is propagated in measured workpiece, and the defective and the interface information of carrying workpiece returns probe, is converted to electric signal through this piezoelectric chip again and enters described ultrasound wave receiving element and carry out amplification filtering and demonstration.Existing ultra-sonic defect detector mostly is analog, form by discrete component and small scale integration, volume is big, weight is big, power consumption is big, flaw detection efficient is low, the flaw detection data are difficult for preserving, and can not reach gratifying effect at aspects such as speed, precision, resolution, reliabilities, should use very inconvenient.
High-speed, the high precision that Non-Destructive Testing is proposed along with modern industry, high resolution, high reliability and on-the-spot requirement such as easy to use, the robotization of ultrasonic detection equipment and the miniaturization of instrument, digitizing have become developing direction.A kind of digitalized ultrasonic defectoscope has appearred at present, it constitutes as shown in Figure 1, except that comprising the probe 101 that is provided with piezoelectric chip, ultrasonic transmit circuit unit 102, ultrasound wave receiving circuit unit 120, the little processing and control element (PCE) 100 of monolithic that its control module is made up of chip microprocessor 111, interface circuit unit 115, keyboard circuit unit 113 and logic control circuit unit 112.Wherein logic control circuit unit 112 is made up of a plurality of small-scale logical circuits, has the shortcoming that volume is big, power consumption is high, reliability is low.The ultrasound wave receiving element carries out amplification filtering with received defective of carrying workpiece and interface signal, through the little processing and control element (PCE) of monolithic sampled data is processed and displayed, and detects a flaw and generates apart from amplitude curve.Since the signal handling capacity of single-chip microcomputer a little less than, and along with further requirement qualitative to the ultrasonic inspection signal, quantitative test, it can not satisfy modern society to instrument and equipment digitizing, informationalized demand.In addition, ultrasonic transmit circuit (as shown in Figure 3) in the existing this digitalized ultrasonic defectoscope is made up of DC/DC circuit, transistor pulsing circuit, wherein the DC/DC circuit is that low dc voltage is transformed into high direct voltage, produces high-voltage pulse via transistor switch and RC differentiating circuit again.DC/DC circuit wherein is very huge and power consumption is very big, does not meet the requirement of low-power consumption, miniaturization.
Summary of the invention
Purpose of the present invention just provides a kind of digital ultrasonic flaw detector of being made up of VLSI (very large scale integrated circuit), this defectoscope volume is little, in light weight, flaw detection efficient height, can generate and show echo amplitude curve at any time, and can when finishing flaw detection work, effectively keep the flaw detection data, with these data of playback at any time; In addition, the present invention also can provide powerful data-handling capacity by being connected with computing machine.
Another object of the present invention provides the digital ultrasonic flaw detector of the radiating circuit of a kind of low-power consumption, miniaturization.
For realizing above purpose, the following technical scheme of the special proposition of the present invention:
A kind of digital ultrasonic flaw detector comprises probe, ultrasonic transmit circuit unit, ultrasound wave receiving circuit unit, control circuit and display, and is provided with the little processing and control element (PCE) of monolithic in this control circuit; It is characterized in that:
Be provided with the digital signal processor circuit unit; This digital signal processor circuit unit comprises: storer, digital signal processor and display circuit also are connected with analog to digital conversion circuit and sampled data buffer circuit between this digital signal processor circuit unit and this ultrasound wave receiving circuit unit; Wherein: the output of ultrasound wave receiving circuit unit connects digital signal processor by analog to digital conversion circuit and sampled data buffer circuit; Digital signal processor connects storer, digital signal processor and the little processing and control element (PCE) of storer order sheet;
The instantaneous high pressure pulse that this ultrasound emission circuit unit is produced, piezoelectric chip in this probe and produce ultrasound transmit signal, this ultrasonic emitting signal is propagated in measured workpiece, and the defective and the interface information of carrying workpiece are returned probe, be converted to electric signal through this piezoelectric chip again and enter described ultrasound wave receiving element and carry out amplification filtering, be converted to digital signal, deliver to sampled data buffer circuit buffer memory through analog to digital conversion circuit; Digital signal processor takes out the digital signal of buffer memory, and the Echo Rating of digital signal representative is generated echo amplitude curve send the display demonstration via display circuit after computing.
Described digital ultrasonic flaw detector, it is characterized in that: warded off host interface and shared memory in digital signal processor inside, chip microprocessor conducts interviews by the shared memory of host interface to digital signal processor, and then realizes controlled variable is set and the order issue; On the other hand, digital signal processor also can feed back to chip microprocessor by result of calculation and the running status that host interface is stored shared memory.
Described digital ultrasonic flaw detector, it is characterized in that: the little processing and control element (PCE) of this monolithic also comprises logic control circuit and the keyboard circuit that is connected with chip microprocessor, logic control circuit is responsible for the logical sequence control of decoding, sample circuit and the radiating circuit of control system, and keyboard circuit then is connected with the external input keys dish.
Described digital ultrasonic flaw detector is characterized in that: be connected liquid crystal display circuit with the digital signal processor in this digital signal processor circuit unit, and show that by display screen echo amplitude curve is to detect a flaw.
Described digital ultrasonic flaw detector is characterized in that: the interface circuit unit that the chip microprocessor in this chip microprocessor unit also is connected with the cell voltage supervisory circuit and is connected with the computing machine or the printer of outside.
Described digital ultrasonic flaw detector is characterized in that: described interface circuit unit, adopt RS232 serial bus interface standard.
Described digital ultrasonic flaw detector is characterized in that: be provided with buzzer siren, carry out the afferent echo warning and lose the ripple warning according to the instruction of control module.
The invention has the advantages that:
Owing to realized that digitizing, this defectoscope can utilize the powerful data processing function of computing machine, " fast, high precision, carry out detection, location, assessment and the diagnosis of workpiece inside number of drawbacks (as: crackle, be mingled with, pore etc.) to high resolving power; Can when finishing flaw detection work, keep flaw detection data and the flaw detection data that playback at any time kept effectively; And,, make this defectoscope volume little, in light weight, easy to carry owing to adopted the VLSI (very large scale integrated circuit) structure; The present invention also reduces Overall Power Consumption by low power dissipation design, prolongs battery working time, makes things convenient for field work; This digital ultrasonic flaw detector both can be applicable to the laboratory, also can be applicable to engineering site, the field that need carry out defects detection and quality control at manufacturing industry, smelting iron and steel industry, metal-processing industry, chemical engineering industry etc. all is widely used, and what also be widely used in fields such as Aero-Space, railway traffic, boilers and pressure vessel is using as a servant safety inspection and life appraisal.
Description of drawings
Fig. 1 is the circuit block diagram of existing digital ultrasonic flaw detector.
Fig. 2 is the circuit block diagram of defectoscope of the present invention.
Fig. 3 is the circuit diagram of the transmitter unit in the existing digital ultrasonic flaw detector.
Fig. 4 is the circuit diagram of the transmitter unit of defectoscope of the present invention.
Fig. 5 is the circuit block diagram of the ultrasound wave receiving circuit unit of defectoscope of the present invention.
Fig. 6 A-Fig. 6 C is the detailed circuit diagram of the control circuit of defectoscope of the present invention.
Embodiment
Please see Figure shown in 2, be defectoscope block scheme of the present invention, digital ultrasonic flaw detector of the present invention, comprise probe 101, be provided with piezoelectric chip in this probe, the inside of this defectoscope also includes the ultrasonic transmit circuit unit 102 and the ultrasound wave receiving circuit unit 120 that are connected with this probe 101 and (comprises pre-amplification circuit 103, programme-controlled gain circuit 104, filtering circuit 105), damping is selected and probe switch circuit units 107, and the little processing and control element (PCE) 100 of monolithic that is connected with the ultrasound wave receiving circuit unit with described ultrasonic transmit circuit unit 102; Wherein: the little processing and control element (PCE) 100 of monolithic mainly comprises chip microprocessor MCU (Micro programmed Control Unit) 111, logic control circuit unit 112, keyboard circuit unit 113, cell voltage supervisory circuit unit 114, interface circuit unit 115, mainly be responsible for system initialization, keyboard response, printer driver, with the functions such as communication of host computer; For solving the existing deficiency of controlling the signal handling capacity of the chip microprocessor that is adopted, the present invention has set up digital signal processor circuit unit 130; This digital signal processor circuit unit 130 comprises: storer 109, digital signal processor DSP (Digital Signal Processing) 108 and display circuit 110 also are connected with analog to digital conversion circuit 106 and sampled data buffer circuit 116 between this digital signal processor circuit unit 130 and this ultrasound wave receiving circuit unit 120; Wherein: the output of ultrasound wave receiving circuit unit 120 connects digital signal processor 108 by analog to digital conversion circuit 106 and sampled data buffer circuit 116; Digital signal processor 108 connects storer 109, logic control circuit unit 112 and chip microprocessor MCU111 in the little processing and control element (PCE) 100 of digital signal processor 108 order sheets; Storer 109 connects logic control circuit unit 112.Logic control circuit of the present invention unit 112 adopts extensive logical device to replace a plurality of small-scale logical devices, thereby has reduced volume and power consumption and reliability is improved greatly.
Coordinate mutually between chip microprocessor 111 and the digital signal processor 108, collaborative work, shared memory 1081 and host interface 1082 (HPI have been opened up in digital signal processor 108 inside, HostPort Interface), chip microprocessor 111 conducts interviews by the shared memory 1081 of 1082 pairs of digital signal processor DSPs of host interface, and then realizes parameter setting and order issue to digital signal processor; On the other hand, digital signal processor DSP also can feed back to chip microprocessor (MCU) 111 with result of calculation and running status by HPI1082 and shared memory 1081.This composition of the present invention makes the structure of instrument more clear, and data-handling capacity and control ability are more powerful.
Fig. 4 is the detailed circuit diagram of digital ultrasonic flaw detector radiating circuit of the present invention unit 102.This ultrasonic transmit circuit unit 102 is made up of driving circuit 1021 and the high-pressure generating circuit and the pulse shaping circuit that are subjected to this driving circuit control, wherein: this high-pressure generating circuit by be connected to two switches between the positive and negative 5V power supply, the inductance that is serially connected with between two switches is formed, one termination pulse shaping circuit of this inductance, this driving circuit is controlled the break-make of two switches.In Fig. 4 specific embodiment, this two switch is the transistor switch that is made of P type switching tube VQ2 and N type switching tube VQ1 respectively; The drain electrode of this P type switching tube VQ2 connects+the 5V power supply, and source electrode connects inductance L, and the control utmost point meets the 0B of driving circuit 1021; The drain electrode of this N type switching tube VQ1 connects-the 5V power supply, and source electrode connects the other end of this inductance, and the control utmost point meets another output 0A of driving circuit; This pulse shaping circuit is made of N type switching tube VQ1 and RC differentiating circuit; Be connected to fly-wheel diode V6 between the source electrode of the drain electrode of this N type switching tube and this P type switching tube.Owing to cancelled DC/DC high pressure generator huge in the existing ultrasonic transmit circuit unit, thereby made ultrasonic transmit circuit of the present invention unit have the characteristics of low-power consumption, small size.Its course of work is: driving circuit 1021 is subjected to 112 controls of logic control circuit unit, make VQ1, VQ2 conducting, electric current I by+5V power supply via VQ1, inductance L, the VQ2 flow direction-5V power supply, turn-off VQ1, VQ2 then simultaneously, electric current becomes 0 by I immediately in the inductance L, then the inductance two ends will produce induced potential, and when induced potential makes the VQ1 conducting to moment of peaking, then the RC differentiating circuit is exported a high pressure negative pulse.
The instantaneous high pressure pulse that this ultrasound emission circuit unit is produced, piezoelectric chip in this probe and produce ultrasound transmit signal, this ultrasonic emitting signal is propagated in measured workpiece, and the defective and the interface information of carrying workpiece are returned probe, be converted to electric signal through this piezoelectric chip again and enter described ultrasound wave receiving element and carry out amplification filtering, be converted to digital signal, deliver to sampled data buffer circuit buffer memory through analog to digital conversion circuit; Digital signal processor takes out the digital signal of buffer memory, and the Echo Rating of digital signal representative is generated echo amplitude curve (A sweeps curve) automatically after computing.
The course of work of defectoscope of the present invention is described in detail in detail below in conjunction with accompanying drawing:
To pop one's head in 101 contact with measured workpiece surface, produces the instantaneous high pressure pulses by ultrasound emission circuit unit 102, and this high-voltage pulse arrives the piezoelectric chip (not shown) of probe, generation ultrasound transmit signal through probe wire; The ultrasonic emitting signal is propagated in measured workpiece, and the defective and the interface information of carrying workpiece are returned probe 101, be converted to the ultrasound wave receiving element that electric signal enters this defectoscope behind the piezoelectric chip through probe, Fig. 5 is the circuit block diagram of ultrasound wave receiving circuit unit, because of the circuit among this figure is the non-improvement of the present invention of prior art, so provider's block diagram only; And please in conjunction with shown in Figure 2, this ultrasound wave receiving element is made up of three parts: receive pre-amplification circuit 103, programme-controlled gain circuit 104, filtering circuit unit 105; Wherein receive pre-amplification circuit 103 by first order amplifier, impact damper, attenuator, and analog switch forms, programme-controlled gain circuit 104 is real in the present embodiment to be second level amplifier, 105 of filtering circuits comprise wave filter and third level amplifier composition; Prestage is made up of three passages: be respectively first order amplifier, impact damper, attenuator, and pass through the analog switch gating to second level amplifier.Wave filter is made up of three filtering channels, is respectively: low channel 0.1-1MHz; Intermediate-frequency channel 0.5-4MHz; High frequency way 2-10MHz; First order amplifier and third level amplifier have adopted current mode broad band amplifier (MAX4180), and second level amplifier has adopted the AD604 of ANALOG DEVICE company.The electric signal that this ultrasound wave receiving element is received amplifies and filtering through this ultrasound wave receiving element, exports to analog to digital conversion circuit 106 then, is changed into digital signal, delivers to temporary cache in the sampled data buffer circuit 116 again; So far finished the reception of signal.
The digital signal processor circuit unit 130 of this defectoscope will carry out data processing work to the digital signal of buffer memory then, wherein: digital signal processor (DSP) 108 takes out digital signal and carries out data processing from sampled data buffer circuit 116, the Echo Rating of digital signal representative is generated echo amplitude curve after computing, and give liquid crystal display circuit 110 simultaneously; On the control panel of this defectoscope, be provided with the display screen (not shown), be connected, carry out the output of demonstration real-time dynamicly of waveform with this liquid crystal display circuit 110; 109 storages of being responsible for the flaw detection data in memory circuitry unit make this defectoscope can keep the flaw detection data effectively when finishing flaw detection work, and show the flaw detection data that kept according to user's input instruction playback at any time.
The control core of the little processing and control element (PCE) 100 of the monolithic of this defectoscope is a chip microprocessor 111, as previously mentioned, it be externally connected to logic control circuit unit 112, keyboard circuit unit 113, cell voltage supervisory circuit unit 114 and interface circuit unit 115, main be responsible for system initialization, keyboard response, printer driver, with the functions such as communication of host computer, realize operation control, voltage monitoring, printing communication and logic control to instrument system.Wherein, the decoding of control system, the logical sequence control of sample circuit and the logical sequence control of radiating circuit are responsible in logic control circuit unit 112.The user can carry out the setting of waveform storage mode, metering system, measuring unit's (is measuring unit as selecting mm or inch), indication range, show rulers, sweep limit, gain, selection operation language or the like by keyboard circuit unit 113.A battery also is equipped with in the present invention, voltage monitoring circuit unit 114 can be monitored in real time to this battery status, when cell voltage is not enough, can show that this display mode can be bright lamp, sends the sound, show or the like to inform that the user in time changes battery or charges on display screen.The chip microprocessor 111 of this defectoscope also is provided with an interface circuit unit 115, adopt RS232 serial bus interface standard, this interface can connect computing machine or printer, keep supplying the flaw detection action of bit machine control operation instrument, also can read the Wave data and the flaw detection parameter that are stored in the ultra-sonic defect detector, perhaps by printer output.This defectoscope also is provided with a buzzer siren (not shown), carries out the afferent echo warning and loses the ripple warning according to the instruction of control module.
Fig. 6 A-Fig. 6 C discloses the detailed circuit diagram of the control circuit (little processing and control element (PCE) 100 of monolithic and digital signal processor circuit unit 130) of defectoscope of the present invention.In preferred embodiment of the present invention:
Digital signal processor circuit 108 adopts the TMS320VC5402PGE100 of TIX, and operation efficiency is higher than common single-chip microcomputer far away.In circuit, digitized ultrasonic signal basis signal Processing Algorithm is carried out filtering, enhancing and identification handle.Wherein: address port A0-A15, FPDP D0-D15 connect sampled data buffer circuit 116 by address wire and data line; The READY port connects display circuit 110, as the internal operation status signal of SED1374; / HDS1 ,/HDS2, HBIL ,/HCNTL0 ,/HCNTL1, HR/W ,/HCS and/the corresponding port of HAS port order sheet microprocessor 111, as the control signal of HPI interface; / IOSTRB ,/MSTRB, R/W ,/IS ,/DS ,/PS and XF port connect the corresponding port of logic control circuit unit 112, as the control signal output of DSP.This group signal is inner through various slice choosings, the reading and writing control signal of logical combination generation to the DSP peripheral hardware at logic control circuit.HP0-HD2 port order sheet microprocessor 111 is as the data bus signal of HPI interface.
Logic control circuit 112 is with CPLD (CPLD, Complex ProgrammableLogic Arrays) be the logic control circuit at center, the logical sequence control of the decoding of system, the control of the logical sequence of sample circuit and radiating circuit all realizes that by CPLD the CPLD device of selecting in the present embodiment is the EPM7128SQC100-10 of ALTERA company.Wherein: the AD0-AD6 port is data/address multiplex signals of chip microprocessor by the corresponding port of address wire order sheet microprocessor 111; The AA12-AA14 port, is used for deciphering as the high address line of chip microprocessor by the A12-A14 of address wire order sheet microprocessor 111; / INT_AD connects digital signal processor DSP as the sampling end interrupt, is used for triggering the read operation of DSP to sampled data; FIRE_TL, FIRE_TO port connect the driving circuit in the ultrasonic transmit circuit unit, the clock signal of control ultrasound emission circuit; / W_KB ,/the R_KB port connects keyboard circuit unit 113, as the read-write matrix keyboard; / RD_LCD ,/WR_LCD ,/CS_LCD connects display circuit 110, SED1374 read and write control operation; / WR ,/RD order sheet microprocessor 111, be the read-write control signal of chip microprocessor; ENCODE, PWRDN port connect analog to digital conversion circuit 106, carry out analog to digital conversion under the sequential control of this signal; AK0-AK16 connects sampled data buffer circuit 116 by address wire, the address signal of output high-speed SRAM; / SEL_BUF ,/CS_BUF ,/RD_BUF ,/WR_BUF connects sampled data buffer circuit 116 by control line, the read-write control signal of transmitting high speed SRAM; A14-A19 connects the corresponding port of digital signal processor 108 by address wire, the address signal of transmission DSP; R/W ,/IS ,/DS ,/PS ,/IOSTRB ,/MSTRB and XF meet DSP108, are the read-write control signal of DSP.
Display control chip in the display circuit 110 is the SED1374 of EPSON company, and in circuit, it is connected with the data bus of dsp chip by DSP, and by CPLD control read-write operation.
Primary Component in the ultrasonic transmit circuit unit 102 is that model is that driving circuit and the model of TC426 is the field effect transistor of BSP298 and BSP315.
Ultrasonic signal sampling is to carry out work under the logic control of CPLD, its analog to digital conversion circuit 106 adopts chip AD9057, analog to digital conversion circuit 106 of the present invention is the high speed A circuit that adopt the phase place synthetic technology, adopt the mode of the synthetic a collection of equivalent sampling of double sampling, the control signal phase deviation of control double sampling is 180 degree, thereby utilize low speed (40MHz) A/D sampling cheaply device, system's ultrasonic simulation signals sampling speed has been brought up to 80MHz, and possessed and brought up to higher sampling rate (as 160MHz, 240MHz, 320MHz or higher, but depend on the speed of complexity range logical device) ability.Thereby improved flaw detection resolution.
This analog to digital converter will be simulated ultrasonic signal sampling and be converted to digital signal under the control and clock signal control of logic control circuit unit 112.Slewing rate is 20-80MHz (system adjusts automatically according to sound path), and conversion accuracy is 8.Wherein: the ENCODE port connects the sampling time sequence control end of logic control circuit unit 112.Sampling time sequence is produced by the logic control circuit internal logic, and the frequency of sampling can be regulated; The PWRDN port connects the power control terminal of logic control circuit unit 112, and when PWRDN=1, device enters the state of quitting work; During PWRDN=o, device enters duty.
Sampled data buffer circuit 116 after the analog to digital conversion is high-speed SRAM, and its model is IS63LV102415.Effect is: in analog-digital conversion process, under the control and clock signal control of logic control circuit unit 112, the digital signal that ADC produces is carried out buffer-stored; After analog-digital conversion process finished, digital signal processor DSP 108 can be read the data of buffer-stored, so that carry out follow-up data processing.Wherein: the A0-A16 port connects logic control circuit unit 112, as the address selection of 1SRAM; The DQ0-DQ7 port connects analog to digital conversion circuit 106 and digital signal processor 108, during as input, is connected with the data line of analog to digital conversion circuit; When doing output, be connected with the data line of DSP; It is the passage of SRAM data input and output; Chip selection signal/CS mouth connects logic control circuit unit 112, and when visit SRAM, logic control circuit is deciphered the address and made this signal effective; Read signal/OE mouth connects logic control circuit unit 112, and when SRAM was carried out read operation, logic control circuit made this signal effective; Write signal/WR mouth connects logic control circuit unit 112, and when SRAM was carried out write operation, logic control circuit made this signal effective.
Certainly, the chip of above-mentioned each circuit unit also can adopt other models, as long as can realize function of the present invention, all should be included in the interest field of the present invention.
In addition, the probe of this defectoscope (101) can be one or a plurality of, to adapt to the needs of real work.This defectoscope also is provided with a buzzer siren, carries out the afferent echo warning and loses the ripple warning according to the instruction of control module.
Digital reflectoscope provided by the present invention, owing on the basis of the little processing and control element (PCE) of monolithic, increased the digital signal processor circuit unit in the control circuit, make on the function basis of traditional reflectoscope, in conjunction with the characteristics of digital instrument, added following unique function: can realize the dynamic DAC curve of automatic or manual making gamut, realize the interior broadening of gate and the screen hard copy of sampling, the peak edge metering system, self-shooter, the scale function, the gain micro-stepping, the mode of operation of boss's menu, the menu locking, data lock, multi-lingual etc.
The dynamic DAC curve of said automatic or manual making gamut is meant provides automatic, manual two kinds to make the DAC curves and make the dynamic DAC curve of gamut.Automatic and manual dual mode is represented the acquiring way of two kinds of different DAC calibration points respectively, according to the principle of multiecho, demarcates first automatic mobile gate in some back by gate and obtains all the other each points under the automated manner; Manual mode is that obtaining all of each calibration point must be demarcated by manual mobile gate then.The making of DAC (Distance Amplitude Curve) generally is to demarcate with the equivalent defect echo of different depth, then each calibration point is coupled together with curve, is used to assess the equivalent size of a certain degree of depth defective.Gate is to be used for selecting to be concerned about the zone, catches with the feature of carrying out flaw echo, catches such as peak value.Under the manual mode, need to regulate earlier gate being set, then obtain peak point, then continue flaw echo demarcation next time to the flaw echo zone.The multiecho of defective is equivalent to the equivalent defect echo of different depth, and the distance between each time echo is equally spaced, utilize this principle, can obtain unique point automatically: demarcate flaw echo for the first time by gate, obtained the flaw echo spacing simultaneously, carrying out next timing signal, gate is automatically moved to the flaw echo next time that we are concerned about, carry out feature simultaneously and catch, and the like can obtain the calibration point of desired depth scope, can draw the DAC curve.In addition, also can be used in combination, under automated manner, demarcate earlier, then under automated manner, carry out the demarcation of all the other points according to user's needs.Digital ultrasonic flaw detector provided by the present invention both can realize making by hand the DAC curve as existing ultra-sonic defect detector, also can realize making automatically the DAC curve.
The dynamic DAC curve of gamut is meant, no matter is also to be to use in the DAC curve process in making, and along with the modification of user to indication range and gain setting, curve is corrigendum automatically thereupon also.
In the manufacturing process of DAC curve, the user can regulate gain according to the flaw echo height and then demarcate to reach preferably signal to noise ratio (S/N ratio), and meaning is promptly dynamically made DAC; Also but gamut is made: finish the part demarcation in current display area after, regulate measurement range or be shifted to delay time and continue the wider flaw echo of demarcation, thereby make the scope of application of DAC curve obtain enlarging.When using the DAC curve, the DAC curve of having demarcated can be done corresponding correction along with the variation of gain and measurement range.And traditional method is that also to be to use the DAC curve all be to carry out in fixing gain and measurement range making, and this just need be according to gaining and measurement range different, and the DAC curve of making a series of segmentations is with standby.
The dynamic DAC curve plotting of gamut provided by the invention is: at first obtained position, eigenwert, the corresponding yield value of unique point by the position in sample sequence, regulate gain according to the flaw echo height and then demarcate to reach preferably signal to noise ratio (S/N ratio) again; And after in current display area, finishing the part demarcation, regulate measurement range or the wider flaw echo of displacement time-delay continuation demarcation, thereby make the scope of application of DAC curve obtain enlarging.
Digital reflectoscope of the present invention is based on broadening in the gate of sample sequence.Can easily observe the details of enriching of the interior waveform of gate scope rapidly, so that the assessment of defective; And the Wave data of these details derives from actual sampled data, is not interpolation, match or other signal processing method gained.Need in some applications qualitatively defect type even quantitative defect size is assessed, at this moment just be necessary waveform is launched to observe details.Classic method is at first to regulate the correct position of delaying time that is shifted under bigger measurement range, then measurement range is dwindled to observe the waveform details again; In native system, we have effectively utilized gate initial sum width to choose to be concerned about the zone, by shortcut the waveform in the gate are amplified then to reach the purpose that we observe details, the intuitive and convenient that just operates so more.In addition, the method for realization has two classes: based on showing that sample sequence D (m) carries out the match interpolation or based on sample sequence S (n).The ultrasonic echo simulating signal forms sample sequence S (n) through high-speed AD sampling back, then again according to the needs that show, sample sequence is carried out double sampling and feature is caught generation display sequence D (m).The forward and backward sample sequence of broadening is respectively S1 (n), S2 (n), and display sequence is respectively D1 (m), D2 (m).If adopt the method for match interpolation, its utilization of D2 (m) be part sample among the D1 (m), all the other samples obtain by algorithm, do not increase effective information; Native system adopts the scheme based on sample sequence, when broadening, from source sample sequence S1 (n), intercept the sample sequence S2 (n) of corresponding current indication range earlier or improve physics AD sampling rate and obtain new source sample sequence S2 (n) according to current measurement range, and then S2 (n) is carried out double sampling and feature catch and obtain new display sequence D2 (m), thereby so just can utilize the source sampling sequence that the rich details waveform is provided as much as possible.
Digital reflectoscope provided by the present invention also has the screen hard copy function.Promptly just the screen display Print All can be come out, reach " institute according to circumstances gained " effect different with common report printing by a key operation.Screen hard copy is that the current demonstration according to screen prints, and is commonly called as " What You See Is What You Get ".On the process that realizes, both also have very big difference.Report printing is according to waveform display sequence D (m) waveform to be drawn on printer paper, and the flaw detection parameter of current setting and The results of data processing tabulated on printer paper draw out, the desired data source is exactly the flaw detection parameter and the The results of data processing of waveform display sequence D (m), current setting; For screen hard copy, only be the data that are used for the display buffer of screen display directly to be duplicated print, data source is exactly the data in the video memory.Comparatively speaking, the former desired data amount is less, but prints the programming relative complex; And the required video memory data volume of the latter is bigger, but programming only needs data duplicate simple relatively.
Digital reflectoscope provided by the present invention can provide unique data storage function.At first can select the waveform storage mode still is the one-tenth-value thickness 1/10 storage mode, under the waveform mode, stores current A and sweeps waveform and parameter current setting, printable flaw detection report this moment; Under the one-tenth-value thickness 1/10 mode, can store one group of one-tenth-value thickness 1/10, printable thickness measuring report this moment.Thickness storage is the mechanism that adopts dynamic memory in addition, 100 groups of totally 10000 one-tenth-value thickness 1/10s, and each group can be stored 10000 one-tenth-value thickness 1/10s at most.Adopt the storage scheme of static, dynamic combination according to waveform and thickness storage mode characteristics separately.Under the waveform mode, because data set length is identical, so take the static store method.
Digital reflectoscope provided by the present invention can provide a kind of brand-new gate logical course--automated manner.Promptly on the basis that afferent echo is reported to the police, can with the squiggle automatic stay on screen, avoid omitting to make things convenient for the user to catch flaw echo.
The gate logic mainly is the equivalent size that is used to assess defective, characterizing the size of defective on the certain meaning of the height of flaw echo, logic has afferent echo to report to the police and loses the branch of ripple warning, and so-called afferent echo is reported to the police to anticipate and promptly be higher than the height of gate as if the flaw echo waveform in the gate scope, then reports to the police; Otherwise if be lower than that the gate height reports to the police then is to lose ripple to report to the police.But under traditional gate logic, when finding flaw echo and reporting to the police, general probe has left rejected region in the scanning process, and current demonstration may not just in time be a flaw echo also; Provide automated manner based on this native system, in case find the flaw echo meet the demands then when reporting to the police, waveform is frozen on the display screen so that observation and analysis.
Digital reflectoscope provided by the present invention can provide the gain micro-stepping.Can make the variation of waveform trickleer in the process of gain-adjusted thus, continuously smooth more.Usually the step gain of fault detection system is apart from the control accuracy that depends on program control amplification, be subjected to the limitation of program control amplification chip and control input D/A chip thereof, in order to obtain trickleer gain-adjusted effect, native system adopts LUT (Look-Up Table) technology to realize littler step gain distance on hard-wired least gain step pitch basis.So-called LUT divides hard-wired least gain step pitch as required exactly and cuts open, and the times magnification ordered series of numbers one-tenth table of intermediate gain correspondence that will cut apart generation then is so that inquire about.
Claims (7)
1. a digital ultrasonic flaw detector comprises probe, ultrasonic transmit circuit unit, ultrasound wave receiving circuit unit, control circuit and display, and is provided with the little processing and control element (PCE) of monolithic in this control circuit; It is characterized in that:
Be provided with the digital signal processor circuit unit; This digital signal processor circuit unit comprises: storer, digital signal processor and display circuit also are connected with analog to digital conversion circuit and sampled data buffer circuit between this digital signal processor circuit unit and this ultrasound wave receiving circuit unit; Wherein: the output of ultrasound wave receiving circuit unit connects digital signal processor by analog to digital conversion circuit and sampled data buffer circuit; Digital signal processor connects storer, digital signal processor and the little processing and control element (PCE) of storer order sheet;
The instantaneous high pressure pulse that this ultrasound emission circuit unit is produced, piezoelectric chip in this probe and produce ultrasound transmit signal, this ultrasonic emitting signal is propagated in measured workpiece, and the defective and the interface information of carrying workpiece are returned probe, be converted to electric signal through this piezoelectric chip again and enter described ultrasound wave receiving element and carry out amplification filtering, be converted to digital signal, deliver to sampled data buffer circuit buffer memory through analog to digital conversion circuit; Digital signal processor takes out the digital signal of buffer memory, and the Echo Rating of digital signal representative is generated echo amplitude curve send the display demonstration via display circuit after computing.
2. digital ultrasonic flaw detector as claimed in claim 1, it is characterized in that: warded off host interface and shared memory in digital signal processor inside, chip microprocessor conducts interviews by the shared memory of host interface to digital signal processor, and then realizes controlled variable is set and the order issue; On the other hand, digital signal processor also can feed back to chip microprocessor by result of calculation and the running status that host interface is stored shared memory.
3. digital ultrasonic flaw detector as claimed in claim 1, it is characterized in that: the little processing and control element (PCE) of this monolithic also comprises logic control circuit and the keyboard circuit that is connected with chip microprocessor, logic control circuit is responsible for the logical sequence control of decoding, sample circuit and the radiating circuit of control system, and keyboard circuit then is connected with the external input keys dish.
4. digital ultrasonic flaw detector as claimed in claim 1 is characterized in that: be connected liquid crystal display circuit with the digital signal processor in this digital signal processor circuit unit, and show that by display screen echo amplitude curve is to detect a flaw.
5. digital ultrasonic flaw detector as claimed in claim 1 is characterized in that: the interface circuit unit that the chip microprocessor in this chip microprocessor unit also is connected with the cell voltage supervisory circuit and is connected with the computing machine or the printer of outside.
6. digital ultrasonic flaw detector as claimed in claim 5 is characterized in that: described interface circuit unit, adopt RS232 serial bus interface standard.
7. digital ultrasonic flaw detector as claimed in claim 1 is characterized in that: be provided with buzzer siren, carry out the afferent echo warning and lose the ripple warning according to the instruction of control module.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101687238A CN100545652C (en) | 2003-09-30 | 2003-09-30 | Method for widening in the gate of observed echo amplitude curve |
| CNB2006101687242A CN100520396C (en) | 2003-09-30 | 2003-09-30 | Method for preparing DAC curve of digital portable ultrasonic defect detector |
| CNB031347843A CN100386623C (en) | 2003-09-30 | 2003-09-30 | Digital ultrasonic flaw detector and method for DAC curve making and inward gate stretching |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CNB031347843A CN100386623C (en) | 2003-09-30 | 2003-09-30 | Digital ultrasonic flaw detector and method for DAC curve making and inward gate stretching |
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| CNB2006101687242A Division CN100520396C (en) | 2003-09-30 | 2003-09-30 | Method for preparing DAC curve of digital portable ultrasonic defect detector |
| CNB2006101687238A Division CN100545652C (en) | 2003-09-30 | 2003-09-30 | Method for widening in the gate of observed echo amplitude curve |
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| CN1603813A CN1603813A (en) | 2005-04-06 |
| CN100386623C true CN100386623C (en) | 2008-05-07 |
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| CNB2006101687242A Expired - Fee Related CN100520396C (en) | 2003-09-30 | 2003-09-30 | Method for preparing DAC curve of digital portable ultrasonic defect detector |
| CNB031347843A Expired - Fee Related CN100386623C (en) | 2003-09-30 | 2003-09-30 | Digital ultrasonic flaw detector and method for DAC curve making and inward gate stretching |
| CNB2006101687238A Expired - Fee Related CN100545652C (en) | 2003-09-30 | 2003-09-30 | Method for widening in the gate of observed echo amplitude curve |
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| CNB2006101687242A Expired - Fee Related CN100520396C (en) | 2003-09-30 | 2003-09-30 | Method for preparing DAC curve of digital portable ultrasonic defect detector |
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| CNB2006101687238A Expired - Fee Related CN100545652C (en) | 2003-09-30 | 2003-09-30 | Method for widening in the gate of observed echo amplitude curve |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| FR2903187B1 (en) * | 2006-06-30 | 2008-09-26 | Setval Sarl | NON-DESTRUCTIVE CONTROL, ESPECIALLY FOR TUBES DURING MANUFACTURING OR IN THE FINAL STATE |
| CN101639462B (en) * | 2009-06-16 | 2011-12-21 | 宁波江丰电子材料有限公司 | Method for detecting targets |
| CN103439408A (en) * | 2013-08-20 | 2013-12-11 | 北京巴布科克·威尔科克斯有限公司 | Ultrasonic detection method for weld joint of small-caliber pipe shelf angle |
| CN104515804A (en) * | 2013-09-26 | 2015-04-15 | 中国铁道科学研究院 | Supersonic in-service steel rail quick flaw detection system and supersonic detection apparatus |
| CN103675102B (en) * | 2013-12-17 | 2016-09-28 | 苏州市职业大学 | A kind of ultrasonic measuring device |
| CN104034810B (en) * | 2014-06-19 | 2017-06-06 | 中航复合材料有限责任公司 | A kind of ultrasonic sound emission motivational techniques for detecting composite |
| CN106872585B (en) * | 2017-03-28 | 2019-09-10 | 中车戚墅堰机车车辆工艺研究所有限公司 | A kind of wheel blank axial ultrasonic wave inspection method |
| CN107356680A (en) * | 2017-07-12 | 2017-11-17 | 辽宁红阳检测有限公司 | A kind of rail track broken detector |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN100545652C (en) | 2009-09-30 |
| CN1603813A (en) | 2005-04-06 |
| CN101004406A (en) | 2007-07-25 |
| CN101004407A (en) | 2007-07-25 |
| CN100520396C (en) | 2009-07-29 |
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