CA2308968A1 - Mapping arbitrary signals into sonet - Google Patents
Mapping arbitrary signals into sonet Download PDFInfo
- Publication number
- CA2308968A1 CA2308968A1 CA002308968A CA2308968A CA2308968A1 CA 2308968 A1 CA2308968 A1 CA 2308968A1 CA 002308968 A CA002308968 A CA 002308968A CA 2308968 A CA2308968 A CA 2308968A CA 2308968 A1 CA2308968 A1 CA 2308968A1
- Authority
- CA
- Canada
- Prior art keywords
- rate
- frame
- bits
- timeslots
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1623—Plesiochronous digital hierarchy [PDH]
- H04J3/1629—Format building algorithm
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
Abstract
A synchronizer/de-synchronizer maps continuous format signals of an arbitrary rate into frames of pre-selected single common rate, such as SONET frames, with no bits changed and very little jitter or wander added. In this way, the continuous format signal may be carried transparently as a tributary of a SONET network. Each frame comprises a definite number of fixed stuff bits, including transport overhead bits and reminder fixed stuff bits. A frame also comprises an adjustable number of adaptive stuff bits, resulting from the phase difference between the arbitrary rate and the common rate. A mapping function is performed in a tributary unit shelf of a SONET transport shelf, and the reverse mapping function is performed in a similar way at the far end of a SONET connection. The stuff bits are spread uniformly within the frame.
Claims (20)
1. A method for transmitting a continuous digital signal of an arbitrary rate R1 over a synchronous network as a transparent tributary, comprising:
selecting a fixed length container signal of a rate R, where R is higher than said arbitrary rate R1 of said continuous signal; and at a transmit site, distributing the bits of said continuous signal into valid timeslots of a frame of said container signal and providing stuff bits into invalid timeslots, wherein said invalid timeslots are uniformly interspersed across said frame.
selecting a fixed length container signal of a rate R, where R is higher than said arbitrary rate R1 of said continuous signal; and at a transmit site, distributing the bits of said continuous signal into valid timeslots of a frame of said container signal and providing stuff bits into invalid timeslots, wherein said invalid timeslots are uniformly interspersed across said frame.
2. A method as claimed in claim 1, wherein said container signal is a SONET/SDH signal, and said synchronous network is a SONET/SDH
network.
network.
3. A method as claimed in claim 2, wherein said SONET/SDH
signal further comprises a synchronous tributary.
signal further comprises a synchronous tributary.
4. A method as claimed in claim 2, wherein said SONET/SDH
signal comprises a plurality of transparent tributaries.
signal comprises a plurality of transparent tributaries.
5. A method as claimed in claim 1, wherein said invalid timeslots comprise one of a fixed stuff and an adaptive stuff bit.
6. A method as claimed in claim 5, wherein said step of distributing comprises:
receiving a continuous stream of data bits and determining the phase difference between said arbitrary rate R1 and said rate R;
adding to said continuous stream a definite number of timeslots for accommodating said fixed stuff bits within said frame, and an adjustable number of timeslots for accommodating said adaptive stuff bits within said frame, based on said phase difference.
receiving a continuous stream of data bits and determining the phase difference between said arbitrary rate R1 and said rate R;
adding to said continuous stream a definite number of timeslots for accommodating said fixed stuff bits within said frame, and an adjustable number of timeslots for accommodating said adaptive stuff bits within said frame, based on said phase difference.
7. A method as claimed in claim 6, wherein said adjustable number is substantially larger than said definite number.
8. A method as claimed in claim 6, wherein said definite number includes transport overhead TOH timeslots and reminder fixed stuff bits timeslots.
9. A method as claimed in claim 8, further comprising providing maintenance, operation, administration and provisioning information in said TOH timeslots.
10. A method as claimed in claim 6, wherein said step of adding comprises:
partitioning said frame into a number of equally sized data blocks and said definite number of timeslots;
for each block, determining the number of fixed stuff bits and evenly distributing said fixed stuff bits within said block;
determining a control function .beta. indicative of said adjustable number; and evenly mapping said fixed stuff bits and said adaptive stuff bits uniformly within a next block based on said control function.
partitioning said frame into a number of equally sized data blocks and said definite number of timeslots;
for each block, determining the number of fixed stuff bits and evenly distributing said fixed stuff bits within said block;
determining a control function .beta. indicative of said adjustable number; and evenly mapping said fixed stuff bits and said adaptive stuff bits uniformly within a next block based on said control function.
11. A method as claimed in claim 10, wherein said step of mapping comprises:
providing a counter C for identifying a timeslot in said block;
defining the binary bit reversal a of said control function ~3;
calculating the bitwise transition delta of said counter C; and determining if a timeslot identified by said counter C is an invalid timeslot, whenever a function Valid (C,.beta.) is false; and providing an adaptive stuff bit into said invalid timeslot.
providing a counter C for identifying a timeslot in said block;
defining the binary bit reversal a of said control function ~3;
calculating the bitwise transition delta of said counter C; and determining if a timeslot identified by said counter C is an invalid timeslot, whenever a function Valid (C,.beta.) is false; and providing an adaptive stuff bit into said invalid timeslot.
12. A method as claimed in claim 1, further comprising recovering said continuous signal from said synchronous signal at a receive site, by extracting the data bits of said continuous signal from said valid timeslots of said frame.
13. A synchronizer for mapping a continuous format signal of an arbitrary rate for transport over a synchronous network as a transparent tributary signal, comprising:
a data recovery unit for receiving said continuous format signal and recovering a stream of data bits and a data clock indicative of said arbitrary rate;
a receiver buffer unit for receiving said stream of data bits, determining a phase difference between said arbitrary rate and the rate of a frame of said tributary, and generating a control function .beta.;
a mapping unit for extracting said stream of data bits from said receiver buffer unit at a mapping clock rate, and uniformly distributing a count of stuff bits and data bits into said frame at a block clock rate according to said control function .beta..
a data recovery unit for receiving said continuous format signal and recovering a stream of data bits and a data clock indicative of said arbitrary rate;
a receiver buffer unit for receiving said stream of data bits, determining a phase difference between said arbitrary rate and the rate of a frame of said tributary, and generating a control function .beta.;
a mapping unit for extracting said stream of data bits from said receiver buffer unit at a mapping clock rate, and uniformly distributing a count of stuff bits and data bits into said frame at a block clock rate according to said control function .beta..
14. A synchronizer as claimed in claim 13, wherein said receiver buffer unit comprises:
an elastic store for temporarily storing an amount of data bits of said stream at said data clock and providing said data bits to said mapping unit at said block clock rate;
a digital PLL for determining the phase difference between said arbitrary rate and said mapping clock and providing said control function .beta..
an elastic store for temporarily storing an amount of data bits of said stream at said data clock and providing said data bits to said mapping unit at said block clock rate;
a digital PLL for determining the phase difference between said arbitrary rate and said mapping clock and providing said control function .beta..
15. A synchronizer as claimed in claim 13, wherein said data recovery unit comprises a frequency agile PLL for detecting said arbitrary rate, and a receiver for detecting said data bits using said data clock.
16. A synchronizer as claimed in claim 13, wherein said mapping unit comprises:
a block clock gapper for receiving a clock indicative of the rate of said synchronous frame and providing said block clock of a block rate accounting for all timeslots of said synchronous frame and with gapps accounting for a definite number of timeslots for accommodating fixed stuff bits;
a mapping clock gapper for receiving said block clock and said control signal .beta. and providing a mapping clock of a mapping rate accounting for all timeslots of said synchronous frame and with gapps accounting for an adjustable number of timeslots for accommodating adaptive stuff bits within said frame; and a mapper for receiving said block clock and said mapping clock and accordingly mapping said stream of data bits in said frame.
a block clock gapper for receiving a clock indicative of the rate of said synchronous frame and providing said block clock of a block rate accounting for all timeslots of said synchronous frame and with gapps accounting for a definite number of timeslots for accommodating fixed stuff bits;
a mapping clock gapper for receiving said block clock and said control signal .beta. and providing a mapping clock of a mapping rate accounting for all timeslots of said synchronous frame and with gapps accounting for an adjustable number of timeslots for accommodating adaptive stuff bits within said frame; and a mapper for receiving said block clock and said mapping clock and accordingly mapping said stream of data bits in said frame.
17. A synchronizer as claimed in claim 13, further comprising a receiver OH FIFO for re-arranging a plurality of transport overhead TOH
timeslots for seamless transport of said frame within said synchronous network.
timeslots for seamless transport of said frame within said synchronous network.
18. A synchronizer as claimed in claim 17, further comprising an overhead multiplexer for adding operation, administration, maintenance and provisioning data into said TOH timeslots.
19. A de-synchronizer for reverse mapping a continuous format signal of an arbitrary rate received over a synchronous network as a transparent tributary signal, comprising:
a reverse mapping unit for receiving a frame of said tributary at a block clock rate and a control function Vii, and extracting a stream of data bits at a mapping clock rate, while excluding stuff bits according to said control function Vii;
a transmitter buffer unit for receiving said data bits, and determining a phase difference between said arbitrary rate and the rate of said frame; and a data transmit unit for receiving said data bits and transmitting said continuous format signal at a data rate controlled by said phase difference.
a reverse mapping unit for receiving a frame of said tributary at a block clock rate and a control function Vii, and extracting a stream of data bits at a mapping clock rate, while excluding stuff bits according to said control function Vii;
a transmitter buffer unit for receiving said data bits, and determining a phase difference between said arbitrary rate and the rate of said frame; and a data transmit unit for receiving said data bits and transmitting said continuous format signal at a data rate controlled by said phase difference.
20. A de-synchronizer as claimed in claim 19, wherein said control function .beta. is received in said frame.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/349,087 | 1999-07-08 | ||
| US09/349,087 US7002986B1 (en) | 1999-07-08 | 1999-07-08 | Mapping arbitrary signals into SONET |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CA2308968A1 true CA2308968A1 (en) | 2001-01-08 |
| CA2308968C CA2308968C (en) | 2010-01-26 |
Family
ID=23370856
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA2308968A Expired - Lifetime CA2308968C (en) | 1999-07-08 | 2000-05-18 | Mapping arbitrary signals into sonet |
Country Status (5)
| Country | Link |
|---|---|
| US (3) | US7002986B1 (en) |
| EP (1) | EP1067722B1 (en) |
| JP (1) | JP4530385B2 (en) |
| CA (1) | CA2308968C (en) |
| DE (1) | DE60035926T2 (en) |
Families Citing this family (56)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6522671B1 (en) * | 1999-05-10 | 2003-02-18 | Nortel Networks Limited | Protocol independent sub-rate device |
| US7002986B1 (en) * | 1999-07-08 | 2006-02-21 | Nortel Networks Limited | Mapping arbitrary signals into SONET |
| US7173930B2 (en) * | 1999-10-26 | 2007-02-06 | Ciena Corporation | Transparent flexible concatenation |
| US6937614B1 (en) * | 1999-11-12 | 2005-08-30 | Nortel Networks Limited | Transparent port for high rate networking |
| US6711558B1 (en) | 2000-04-07 | 2004-03-23 | Washington University | Associative database scanning and information retrieval |
| US7139743B2 (en) | 2000-04-07 | 2006-11-21 | Washington University | Associative database scanning and information retrieval using FPGA devices |
| US6870860B1 (en) * | 2000-04-19 | 2005-03-22 | Ciena Corporation | Semi-transparent time division multiplexer/demultiplexer |
| KR100358382B1 (en) * | 2000-08-28 | 2002-10-25 | 엘지전자 주식회사 | Apparatus for parallel mapping of serial input data in SDH system |
| US20020110157A1 (en) * | 2001-02-14 | 2002-08-15 | Kestrel Solutions | Method and apparatus for providing a gigabit ethernet circuit pack |
| US6816509B2 (en) * | 2001-03-02 | 2004-11-09 | Ciena Corporation | Data mapper and method for flexible mapping of control and data information within a SONET payload |
| JP3570507B2 (en) * | 2001-03-28 | 2004-09-29 | 日本電気株式会社 | STM mapping circuit and method |
| ITMI20010726A1 (en) * | 2001-04-05 | 2002-10-05 | Cit Alcatel | METHOD AND APPARATUS TO MAP FAST ETHERNET DATA INTERFACES IN A SINGLE VC-4 VIRTUAL CONTAINER OF A STM-1 / OC-3 PAYLOAD TRANSMITTED IN U |
| DE60203173T2 (en) * | 2001-04-26 | 2006-04-20 | International Business Machines Corp. | METHOD AND DEVICE WITH INPUT / FRAME ADAPTER OF MULTIPLE CHANNELS OF LOW SPEEDS IN A SINGLE HIGH SPEED SDH / SONET CHANNEL |
| DE60108728T2 (en) | 2001-06-15 | 2006-05-11 | Lucent Technologies Inc. | Method and device for transmitting and receiving multiplexed subordinate signals |
| US20030048813A1 (en) * | 2001-09-05 | 2003-03-13 | Optix Networks Inc. | Method for mapping and multiplexing constant bit rate signals into an optical transport network frame |
| US7023942B1 (en) * | 2001-10-09 | 2006-04-04 | Nortel Networks Limited | Method and apparatus for digital data synchronization |
| US7716330B2 (en) * | 2001-10-19 | 2010-05-11 | Global Velocity, Inc. | System and method for controlling transmission of data packets over an information network |
| WO2003043240A1 (en) * | 2001-11-13 | 2003-05-22 | Fujitsu Limited | Virtual concatenation transmission method and device |
| US7227876B1 (en) * | 2002-01-28 | 2007-06-05 | Pmc-Sierra, Inc. | FIFO buffer depth estimation for asynchronous gapped payloads |
| US20030185248A1 (en) * | 2002-03-27 | 2003-10-02 | Adc Telecommunications Israel Ltd. | Simplified bandwidth handling for SDH/SONET access rings |
| US20030225802A1 (en) * | 2002-06-02 | 2003-12-04 | Eci Telecom Ltd. | Enable generator EG, and method of mapping data using the EG |
| IL150011A (en) * | 2002-06-04 | 2007-12-03 | Eci Telecom Ltd | Mapping data in a communication network |
| US7711844B2 (en) | 2002-08-15 | 2010-05-04 | Washington University Of St. Louis | TCP-splitter: reliable packet monitoring methods and apparatus for high speed networks |
| US7324548B2 (en) * | 2002-11-01 | 2008-01-29 | Broadcom Corporation | Transceiver system and method supporting variable rates and multiple protocols |
| EP1416656B1 (en) * | 2002-11-01 | 2014-01-08 | Broadcom Corporation | Transceiver system and method supporting variable rates and multiple protocols |
| JP3886891B2 (en) | 2002-12-10 | 2007-02-28 | 富士通株式会社 | COMMUNICATION SYSTEM, COMMUNICATION DEVICE AND NETWORK MANAGEMENT DEVICE USED IN THE COMMUNICATION SYSTEM |
| US20040114636A1 (en) * | 2002-12-13 | 2004-06-17 | General Instrument Corporation | Asynchronous data multiplexer |
| US7590154B2 (en) * | 2006-09-22 | 2009-09-15 | Applied Micro Circuits Corporation | Sampled accumulation system and method for jitter attenuation |
| WO2004088889A1 (en) * | 2003-03-31 | 2004-10-14 | Fujitsu Limited | Transparent multiplexing method and device |
| CN2671239Y (en) * | 2003-12-05 | 2005-01-12 | 华为技术有限公司 | Synchronous digital transmitting system branch unit for supporting multiple service treatment |
| US10572824B2 (en) | 2003-05-23 | 2020-02-25 | Ip Reservoir, Llc | System and method for low latency multi-functional pipeline with correlation logic and selectively activated/deactivated pipelined data processing engines |
| CA2759064C (en) | 2003-05-23 | 2017-04-04 | Washington University | Intellegent data storage and processing using fpga devices |
| US6956847B2 (en) * | 2003-06-19 | 2005-10-18 | Cisco Technology, Inc. | Multi-rate, multi-protocol, multi-port line interface for a multiservice switching platform |
| KR100566240B1 (en) * | 2004-03-16 | 2006-03-29 | 삼성전자주식회사 | Optical Network Unit in PON by using IEEE1394 |
| JP4230968B2 (en) * | 2004-07-20 | 2009-02-25 | 株式会社日立ハイテクノロジーズ | Charged particle beam equipment |
| JP4417807B2 (en) * | 2004-08-25 | 2010-02-17 | 株式会社東芝 | Elastic buffer |
| JP2008532177A (en) | 2005-03-03 | 2008-08-14 | ワシントン ユニヴァーシティー | Method and apparatus for performing biological sequence similarity searches |
| US7702629B2 (en) * | 2005-12-02 | 2010-04-20 | Exegy Incorporated | Method and device for high performance regular expression pattern matching |
| US7954114B2 (en) | 2006-01-26 | 2011-05-31 | Exegy Incorporated | Firmware socket module for FPGA-based pipeline processing |
| TWI400917B (en) * | 2006-02-09 | 2013-07-01 | Flextronics Int Usa Inc | Data processing systems and methods |
| US7746903B2 (en) * | 2006-03-07 | 2010-06-29 | Harris Corporation | SONET management and control channel improvement |
| US7840482B2 (en) | 2006-06-19 | 2010-11-23 | Exegy Incorporated | Method and system for high speed options pricing |
| US7826490B2 (en) * | 2006-06-29 | 2010-11-02 | Applied Micro Circuits Corporation | System and method for synchronous payload envelope mapping without pointer adjustments |
| US7809022B2 (en) * | 2006-10-23 | 2010-10-05 | Harris Corporation | Mapping six (6) eight (8) mbit/s signals to a SONET frame |
| US7660793B2 (en) | 2006-11-13 | 2010-02-09 | Exegy Incorporated | Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors |
| US8326819B2 (en) | 2006-11-13 | 2012-12-04 | Exegy Incorporated | Method and system for high performance data metatagging and data indexing using coprocessors |
| US7725469B2 (en) * | 2007-08-23 | 2010-05-25 | International Business Machines Corporation | System and program products for pruning objects in a service registry and repository |
| JP5835059B2 (en) * | 2012-03-29 | 2015-12-24 | 富士通株式会社 | Data transmission apparatus and data transmission method |
| US9088380B2 (en) | 2012-05-31 | 2015-07-21 | Ciena Corporation | Optical transport network generic non-client specific protection systems and methods |
| JP5999182B2 (en) * | 2012-07-20 | 2016-09-28 | 富士通株式会社 | Transmission equipment |
| JP6402562B2 (en) * | 2014-09-30 | 2018-10-10 | 富士通株式会社 | Optical transmission apparatus and transmission frame generation method |
| JP6467923B2 (en) * | 2015-01-06 | 2019-02-13 | 日本電気株式会社 | TS data reading device and TS data reading method |
| JP6290852B2 (en) * | 2015-12-24 | 2018-03-07 | 日本電気株式会社 | Signal configuration apparatus, signal configuration system, signal configuration method, and signal configuration program |
| WO2018119035A1 (en) | 2016-12-22 | 2018-06-28 | Ip Reservoir, Llc | Pipelines for hardware-accelerated machine learning |
| US10985837B2 (en) | 2019-06-17 | 2021-04-20 | Ciena Corporation | Generic non-client specific protection via TCM status and enhanced OTN network propagation of client faults |
| US11309984B2 (en) | 2020-03-04 | 2022-04-19 | Ciena Corporation | TCM control for physical layer on OTU ports |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3872257A (en) * | 1974-03-11 | 1975-03-18 | Bell Telephone Labor Inc | Multiplex and demultiplex apparatus for digital-type signals |
| JPH0414681Y2 (en) * | 1986-04-11 | 1992-04-02 | ||
| CA1262173A (en) | 1986-05-29 | 1989-10-03 | James Angus Mceachern | Synchronization of asynchronous data signals |
| US4791652A (en) | 1987-06-04 | 1988-12-13 | Northern Telecom Limited | Synchronization of asynchronous data signals |
| US4967405A (en) * | 1988-12-09 | 1990-10-30 | Transwitch Corporation | System for cross-connecting high speed digital SONET signals |
| US4998242A (en) * | 1988-12-09 | 1991-03-05 | Transwitch Corp. | Virtual tributary cross connect switch and switch network utilizing the same |
| JPH0654901B2 (en) * | 1989-02-08 | 1994-07-20 | 富士通株式会社 | Format conversion control method |
| DE69022577T2 (en) * | 1989-04-28 | 1996-03-28 | Anritsu Corp | SIGNAL GENERATOR AND SIGNAL RECEIVER BASED ON A SYNCHRONOUS MULTIPLEX TRANSMISSION SYSTEM. |
| US4928275A (en) | 1989-05-26 | 1990-05-22 | Northern Telecom Limited | Synchronization of asynchronous data signals |
| CA1326719C (en) * | 1989-05-30 | 1994-02-01 | Thomas E. Moore | Ds3 to 28 vt1.5 sonet interface circuit |
| US5131013A (en) * | 1990-05-30 | 1992-07-14 | At&T Bell Laboratories | Asynchronous-synchronous digital transmission signal conversion |
| DE4027967A1 (en) * | 1990-09-04 | 1992-03-05 | Philips Patentverwaltung | PLUG DECISION CIRCUIT FOR A BITRATE ADJUSTMENT ARRANGEMENT |
| JPH05292055A (en) * | 1992-04-13 | 1993-11-05 | Matsushita Electric Ind Co Ltd | Staff synchronizing device |
| JP3150412B2 (en) * | 1992-05-06 | 2001-03-26 | 富士通株式会社 | SDH accommodating method of asynchronous 32Mb / s signal |
| JPH06261055A (en) * | 1993-03-03 | 1994-09-16 | Mitsubishi Electric Corp | Repeater |
| US5428641A (en) | 1993-07-23 | 1995-06-27 | Motorola, Inc. | Device and method for utilizing zero-padding constellation switching with frame mapping |
| JPH07264152A (en) * | 1994-03-18 | 1995-10-13 | Fujitsu Ltd | Frame mapping/de-mapping system |
| US5453780A (en) * | 1994-04-28 | 1995-09-26 | Bell Communications Research, Inc. | Continous presence video signal combiner |
| JP3376144B2 (en) * | 1994-12-28 | 2003-02-10 | 日本電気株式会社 | Optical network device and optical transmission system |
| US5889781A (en) | 1996-06-11 | 1999-03-30 | Vlsi Technology | Asynchronous timing generator |
| US5784594A (en) | 1996-06-12 | 1998-07-21 | Lucent Technologies Inc. | Generic interactive device model wrapper |
| JP3031251B2 (en) * | 1996-07-08 | 2000-04-10 | 日本電気株式会社 | Low-speed transmission signal interface unit with internal monitoring function and its internal fault monitoring method |
| JPH10145321A (en) * | 1996-11-05 | 1998-05-29 | Fujitsu Ltd | Sdh transmission system and alarm transmission control method |
| US6047005A (en) * | 1998-01-07 | 2000-04-04 | Mci Communications Corporation | Virtual bearer channel platform for processing service requests received in the form of channel data |
| US6240087B1 (en) * | 1998-03-31 | 2001-05-29 | Alcatel Usa Sourcing, L.P. | OC3 delivery unit; common controller for application modules |
| US7002986B1 (en) * | 1999-07-08 | 2006-02-21 | Nortel Networks Limited | Mapping arbitrary signals into SONET |
| US6829247B1 (en) * | 1999-12-23 | 2004-12-07 | Nortel Networks Limited | Method and apparatus for establishing dedicated local area network N) connections in an optical transmission network |
| US6870860B1 (en) * | 2000-04-19 | 2005-03-22 | Ciena Corporation | Semi-transparent time division multiplexer/demultiplexer |
| EP1246383A1 (en) * | 2001-03-28 | 2002-10-02 | Lucent Technologies Inc. | Data transmission system |
| US7277447B2 (en) * | 2001-03-30 | 2007-10-02 | Redback Networks Inc. | Onboard RAM based FIFO with pointers to buffer overhead bytes of synchronous payload envelopes in synchronous optical networks |
| US7362759B2 (en) * | 2001-05-21 | 2008-04-22 | Intel Corporation | Method and apparatus for encoding information |
| US7158517B2 (en) * | 2001-05-21 | 2007-01-02 | Intel Corporation | Method and apparatus for frame-based protocol processing |
-
1999
- 1999-07-08 US US09/349,087 patent/US7002986B1/en not_active Expired - Lifetime
-
2000
- 2000-05-18 CA CA2308968A patent/CA2308968C/en not_active Expired - Lifetime
- 2000-07-06 JP JP2000204447A patent/JP4530385B2/en not_active Expired - Fee Related
- 2000-07-07 DE DE60035926T patent/DE60035926T2/en not_active Expired - Lifetime
- 2000-07-07 EP EP00305782A patent/EP1067722B1/en not_active Expired - Lifetime
-
2002
- 2002-04-18 US US10/124,235 patent/US7257117B2/en not_active Expired - Lifetime
-
2005
- 2005-11-30 US US11/289,351 patent/US7286564B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001069104A (en) | 2001-03-16 |
| US20020159473A1 (en) | 2002-10-31 |
| EP1067722B1 (en) | 2007-08-15 |
| US7286564B2 (en) | 2007-10-23 |
| US7257117B2 (en) | 2007-08-14 |
| DE60035926T2 (en) | 2007-12-06 |
| DE60035926D1 (en) | 2007-09-27 |
| EP1067722A2 (en) | 2001-01-10 |
| EP1067722A3 (en) | 2002-10-02 |
| US7002986B1 (en) | 2006-02-21 |
| JP4530385B2 (en) | 2010-08-25 |
| US20060088061A1 (en) | 2006-04-27 |
| CA2308968C (en) | 2010-01-26 |
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