CA2291682A1 - Boundary scanning element and communication equipment using the same - Google Patents

Boundary scanning element and communication equipment using the same Download PDF

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Publication number
CA2291682A1
CA2291682A1 CA002291682A CA2291682A CA2291682A1 CA 2291682 A1 CA2291682 A1 CA 2291682A1 CA 002291682 A CA002291682 A CA 002291682A CA 2291682 A CA2291682 A CA 2291682A CA 2291682 A1 CA2291682 A1 CA 2291682A1
Authority
CA
Canada
Prior art keywords
terminal
boundary cells
input
output
tdi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002291682A
Other languages
French (fr)
Other versions
CA2291682C (en
Inventor
Mitsugu Nagoya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Duaxes Corp
Original Assignee
Koken Co., Ltd.
Mitsugu Nagoya
Duaxes Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koken Co., Ltd., Mitsugu Nagoya, Duaxes Corporation filed Critical Koken Co., Ltd.
Publication of CA2291682A1 publication Critical patent/CA2291682A1/en
Application granted granted Critical
Publication of CA2291682C publication Critical patent/CA2291682C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • G01R31/2815—Functional tests, e.g. boundary scans, using the normal I/O contacts
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Communication Control (AREA)

Abstract

Provided is a boundary scan element which includes a plurality of input terminal side boundary cells which are connected in series, each being individually allocated to corresponding one of input terminals; a plurality of output terminal side boundary cells which are connected in series, each being individually allocated to corresponding one of output terminals; a TAP circuit for controlling input/output of data to/from the boundary cells on the input/output terminal sides a TDI terminal for receiving serial data to be supplied to the boundary cells a TDO terminal for outputting the data from the boundary cells as serial data;
a TCK terminal for receiving clock signals; and a TMS
terminal for receiving a mode signal to switch an operation mode of the TAP circuit, wherein the boundary cells on the input/output terminal sides are connected in parallel between the TDI and TDO terminals, respectively, and wherein two sets of combinations composed of the input terminal side boundary cells, the output terminal boundary cells, the TDI
terminal, the TDO terminal and the TAP circuit are provided.
CA002291682A 1997-06-02 1998-06-02 Boundary scanning element and communication equipment using the same Expired - Fee Related CA2291682C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP14380497 1997-06-02
JP9/143804 1997-06-02
PCT/JP1998/002432 WO1998055927A1 (en) 1997-06-02 1998-06-02 Boundary scanning element and communication equipment using the same

Publications (2)

Publication Number Publication Date
CA2291682A1 true CA2291682A1 (en) 1998-12-10
CA2291682C CA2291682C (en) 2004-11-02

Family

ID=15347376

Family Applications (4)

Application Number Title Priority Date Filing Date
CA002485309A Abandoned CA2485309A1 (en) 1997-06-02 1998-05-29 Boundary scan element and communication device made by using the same
CA002291681A Expired - Fee Related CA2291681C (en) 1997-06-02 1998-05-29 Boundary scan element and communication device made by using the same
CA002292771A Expired - Fee Related CA2292771C (en) 1997-06-02 1998-06-01 Communication system
CA002291682A Expired - Fee Related CA2291682C (en) 1997-06-02 1998-06-02 Boundary scanning element and communication equipment using the same

Family Applications Before (3)

Application Number Title Priority Date Filing Date
CA002485309A Abandoned CA2485309A1 (en) 1997-06-02 1998-05-29 Boundary scan element and communication device made by using the same
CA002291681A Expired - Fee Related CA2291681C (en) 1997-06-02 1998-05-29 Boundary scan element and communication device made by using the same
CA002292771A Expired - Fee Related CA2292771C (en) 1997-06-02 1998-06-01 Communication system

Country Status (7)

Country Link
US (3) US6658614B1 (en)
EP (3) EP0987632B1 (en)
JP (3) JP4012577B2 (en)
KR (3) KR100454989B1 (en)
CA (4) CA2485309A1 (en)
DE (3) DE69832605T2 (en)
WO (3) WO1998055926A1 (en)

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* Cited by examiner, † Cited by third party
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JP3401523B2 (en) * 1999-01-11 2003-04-28 デュアキシズ株式会社 Communication element and communication device using the same
US7058862B2 (en) 2000-05-26 2006-06-06 Texas Instruments Incorporated Selecting different 1149.1 TAP domains from update-IR state
US20010037479A1 (en) * 2000-04-28 2001-11-01 Whetsel Lee D. Selectable dual mode test access port method and apparatus
US7003707B2 (en) * 2000-04-28 2006-02-21 Texas Instruments Incorporated IC tap/scan test port access with tap lock circuitry
US6934898B1 (en) * 2001-11-30 2005-08-23 Koninklijke Philips Electronics N.V. Test circuit topology reconfiguration and utilization techniques
US7069483B2 (en) * 2002-05-13 2006-06-27 Kiyon, Inc. System and method for identifying nodes in a wireless mesh network
US7852796B2 (en) * 2002-05-13 2010-12-14 Xudong Wang Distributed multichannel wireless communication
US7941149B2 (en) 2002-05-13 2011-05-10 Misonimo Chi Acquistion L.L.C. Multi-hop ultra wide band wireless network communication
US20040229566A1 (en) * 2003-05-13 2004-11-18 Weilin Wang Systems and methods for congestion control in a wireless mesh network
US7957356B2 (en) * 2002-05-13 2011-06-07 Misomino Chi Acquisitions L.L.C. Scalable media access control for multi-hop high bandwidth communications
US20050201340A1 (en) * 2002-05-13 2005-09-15 Xudong Wang Distributed TDMA for wireless mesh network
US8780770B2 (en) 2002-05-13 2014-07-15 Misonimo Chi Acquisition L.L.C. Systems and methods for voice and video communication over a wireless network
US20050201346A1 (en) * 2003-05-13 2005-09-15 Weilin Wang Systems and methods for broadband data communication in a wireless mesh network
US7835372B2 (en) * 2002-05-13 2010-11-16 Weilin Wang System and method for transparent wireless bridging of communication channel segments
ATE449968T1 (en) * 2003-01-28 2009-12-15 Nxp Bv BOUNDARY SCAN CIRCUIT WITH INTEGRATED SENSOR FOR MEASURING PHYSICAL OPERATIONAL PARAMETERS
US8175613B2 (en) * 2006-08-04 2012-05-08 Misonimo Chi Acquisitions L.L.C. Systems and methods for determining location of devices within a wireless network
KR101102719B1 (en) * 2006-12-07 2012-01-05 미소니모 카이 액퀴지션 엘엘씨 System and method for timeslot and channel allocation
GB0712373D0 (en) * 2007-06-26 2007-08-01 Astrium Ltd Embedded test system and method
US8255749B2 (en) * 2008-07-29 2012-08-28 Texas Instruments Incorporated Ascertaining configuration by storing data signals in a topology register
US8331163B2 (en) * 2010-09-07 2012-12-11 Infineon Technologies Ag Latch based memory device
US9208571B2 (en) 2011-06-06 2015-12-08 Microsoft Technology Licensing, Llc Object digitization
CN110659037B (en) * 2019-09-25 2021-03-09 苏州浪潮智能科技有限公司 JTAG-based burning device

Family Cites Families (23)

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JPH0690260B2 (en) 1986-05-30 1994-11-14 三菱電機株式会社 Logic circuit test equipment
JPS6468843A (en) * 1987-09-10 1989-03-14 Matsushita Electric Ind Co Ltd Test mode setting circuit
JPH01229982A (en) 1988-03-10 1989-09-13 Fujitsu Ltd Scanning test system
US4989209A (en) * 1989-03-24 1991-01-29 Motorola, Inc. Method and apparatus for testing high pin count integrated circuits
US5130988A (en) * 1990-09-17 1992-07-14 Northern Telecom Limited Software verification by fault insertion
US5132635A (en) * 1991-03-05 1992-07-21 Ast Research, Inc. Serial testing of removable circuit boards on a backplane bus
JPH04281691A (en) * 1991-03-11 1992-10-07 Sony Corp Self-diagnostic device for digital signal processing circuit
US5325368A (en) * 1991-11-27 1994-06-28 Ncr Corporation JTAG component description via nonvolatile memory
US5377198A (en) * 1991-11-27 1994-12-27 Ncr Corporation (Nka At&T Global Information Solutions Company JTAG instruction error detection
US5400345A (en) 1992-03-06 1995-03-21 Pitney Bowes Inc. Communications system to boundary-scan logic interface
JPH05273311A (en) * 1992-03-24 1993-10-22 Nec Corp Logic integrated circuit
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US5333139A (en) * 1992-12-30 1994-07-26 Intel Corporation Method of determining the number of individual integrated circuit computer chips or the like in a boundary scan test chain and the length of the chain
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Also Published As

Publication number Publication date
EP0987634B1 (en) 2006-08-09
EP0987634A4 (en) 2002-10-09
WO1998058317A1 (en) 1998-12-23
EP0987633B1 (en) 2006-01-25
DE69833320T2 (en) 2006-09-21
EP0987632A4 (en) 2002-10-09
DE69833320D1 (en) 2006-04-13
KR100454989B1 (en) 2004-11-06
EP0987633A1 (en) 2000-03-22
KR20010013021A (en) 2001-02-26
CA2291681C (en) 2005-07-26
EP0987632B1 (en) 2005-11-30
JP3936747B2 (en) 2007-06-27
JP3984300B2 (en) 2007-10-03
JP4012577B2 (en) 2007-11-21
DE69832605D1 (en) 2006-01-05
US6658614B1 (en) 2003-12-02
KR100316000B1 (en) 2001-12-12
KR100315999B1 (en) 2001-12-12
EP0987634A1 (en) 2000-03-22
WO1998055926A1 (en) 1998-12-10
WO1998055927A1 (en) 1998-12-10
DE69835517T2 (en) 2007-08-09
CA2291681A1 (en) 1998-12-10
EP0987633A4 (en) 2002-10-09
CA2291682C (en) 2004-11-02
EP0987632A1 (en) 2000-03-22
CA2292771A1 (en) 1998-12-23
US6671840B1 (en) 2003-12-30
DE69835517D1 (en) 2006-09-21
EP0987633B8 (en) 2006-05-03
CA2292771C (en) 2003-05-20
US6701475B1 (en) 2004-03-02
KR20010013201A (en) 2001-02-26
KR20010013200A (en) 2001-02-26
CA2485309A1 (en) 1998-12-10
DE69832605T2 (en) 2006-08-17

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