CA2135241C - Cavity and bump interconnection structure for electronic packages - Google Patents

Cavity and bump interconnection structure for electronic packages

Info

Publication number
CA2135241C
CA2135241C CA002135241A CA2135241A CA2135241C CA 2135241 C CA2135241 C CA 2135241C CA 002135241 A CA002135241 A CA 002135241A CA 2135241 A CA2135241 A CA 2135241A CA 2135241 C CA2135241 C CA 2135241C
Authority
CA
Canada
Prior art keywords
printed wiring
wiring board
holes
plated
interconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002135241A
Other languages
French (fr)
Other versions
CA2135241A1 (en
Inventor
Mohi Sobhani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of CA2135241A1 publication Critical patent/CA2135241A1/en
Application granted granted Critical
Publication of CA2135241C publication Critical patent/CA2135241C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50—Fixed connections
    • H01R12/51—Fixed connections for rigid printed circuits or like structures
    • H01R12/52—Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50—Fixed connections
    • H01R12/59—Fixed connections for flexible printed circuits, flat or ribbon cables or like structures
    • H01R12/62—Fixed connections for flexible printed circuits, flat or ribbon cables or like structures connecting to rigid printed circuits or like structures
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/361—Assembling flexible printed circuits with other printed circuits
    • H05K3/365—Assembling flexible printed circuits with other printed circuits by abutting, i.e. without alloying process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing

Abstract

Electronic interconnection of two printed wiring structures. Two printed wiring boards (11, 16) or a flexprint circuit (20) and a printed wiring board (11) are interconnected by creating a plated hole pattern (12) on a surface (12) of the printed wiring board (11), and wherein holes (13) of the pattern (12) have a concave cross section. The holes (13) of the plated hole pattern (12) are mated with corresponding bumps (17) or dimples (17) disposed on the second printed wiring board (16) or the flexprint circuit (20). The holes (13) formed in the first printed wiring board (11) are disposed a predetermined depth below a surface (18) of the printed wiring board (11), typically to a depth of between 0.007 inches and 0.020 inches below the surface. The plurality of plated holes (13) are formed by electroless plating or electroplating of the holes (13). The present interconnection structure (10) provides for reliable and self aligning interconnection of the two printed wiring boards (11, 16) or the flexprint circuit (20) and printed wiring board (11).

Description

CA 0213~241 1997-11-12 CAVITY AND BUMP INTERCONNECTION
STRUCTURE FOR ELECTRONIC PACKAGES

BACKGROUND OF THE lNV~NlION

1. Field of the Invention. The present invention relates to electronic packaging, and more particularly, to a cavity and bump interconnection structure for use in electronic packaging.
2. Description of Related Art. The inter-connection of the electronic components, especially high density electronic components and printed wiring boards, presents recurring problems for which many conventional solutions exist. Prior art interconnections techniques that have been used to interconnect two printed wiring boards or a flexprint and a printed wiring board include soldering connectors to both subassemblies and then subsequently mating the connectors. The use of connectors results in bulky, heavy, relatively expensive, and in many cases, an impractical solution. For example, conventional micro-connectors, because of their small size, require soldering or other expensive wiring techniques. Most micro-connectors cannot handle a 3 mil to 5 mil (0.0762 mm to 0.1270 mm) or smaller line width and spacing in an efficient manner.
Many conventional interconnection systems utilize pads or electrically conductive dots, such as the well-known gold-dot interconnection structure, as a means of providing the interconnection, such as is disclosed in United States Patent Nos. 4,125,310 and 4,453,795. These patents describe a plurality of generally resilient metallic raised projections. In the latter patent, a resilient backup mechanism is used to avoid over-stressing and squashing of the resilient projections or contacts beyond their elastic limit, which overstressing precludes repeated mating and unmating of connectors 7 ~ 35 24 11 incorporating such projections. While these terminations otherwise effectively and reliably interconnect mating circuits, their manufacture can be difficult, time consuming and costly. Furthermore, the manufacturing process for forming such bumps is limited to a size of about 2 mil (0.0508 mm) in diameter. These bumps also require proper support, without exposing them to delamination due to outgassing from support materials during or after production or to inattention to thermal matching with its surrounding materials, or to possible electrical or chemical interaction with the surrounding materials.
Another interconnection technique is described in U. S. Patent No. 5,288,235, assigned to the assignee of the present invention. This invention comprises an electrical connector for a flat cable or circuit having contacts or interconnects formed as a bulge arrangement or configuration. The bulge-type contacts or inter-connects are shaped to provide a pointed, serial orcontinuous bulge configuration, such as one or more upsets, wrinkles, folds and creases, e.g., V-shaped and hollow shaped, both in one or more of conductors in the circuit and in any insulation underlying the conductors.
The shape of the bulge configuration is maintained by a support, which also is selected to physically and chemically match with materials surrounding it.
The bulge configurations result from forming the cable to provide one or more bulges in the circuit having concave and convex portions configured as single upsets, or a series of single upsets, or a linear bulge having a V-shaped appearance, or a linear bulge. The support is shaped in accordance with the bulge into which it fits.
Thus, it may comprise a dielectric resin for fitting into the pointed upsets or an extending bar with a V-shaped part, which respectively fits into the bulge concave ~ ~ ~5 ~4 ~

portions or portion. A backing may be applied to the underside of the cable under the single upset, or the bar itself may be affixed to the underside of the circuit by an adhesive or secured into a mating bar on the upper side of the circuit.
The bulge configuration may comprise a series of upsets or a linear or curved wrinkle, fold or crease extending in a pattern across at least some of the conductors and the underlying dielectric circuit material is only one side of the conductors is exposed, although the conductor may be exposed on both sides to enable, for example, a plurality of the circuits to be stacked together and their bulges to interfit and electrically interconnect with adjacent bulges. The pattern may extend across the width of the circuit in any desired fashion, such as at right angles, diagonally, undulating, in the form of a "V", curve, or an arc.
The present invention is intended to provide an additional interconnection technique that is particularly well-adapted for interconnecting two printed wiring boards or a flexprint circuit and a printed wiring board.
Therefore, it is an objective of an aspect of the present invention to provide an improved cavity and bump interconnection structure for use in electronic packaging It is an objective of an aspect of the present invention to provide an interconnection structure that provides for the interconnection of two printed wiring boards or a flexprint circuit and a printed wiring board.
SUMMARY OF TH~ lNv~.~lON
In order to meet the above and other objectives, electronic interconnection between two printed wiring boards or a flexprint circuit and a printed wiring board is achieved in accordance with the present invention by creating a plated hole pattern on the printed wiring ~ ~ ~5 2~ ~

board wherein the holes have a concave form. Holes of the plated hole pattern are mated with corresponding bumps or dimples disposed on the printed wiring board or the flexprint circuit. This interconnection structure provides for reliable and self aligning interconnection of the two printed wiring boards or the flexprint circuit and printed wiring board.
More particularly, the present invention comprises an interconnection structure for use in interconnecting first and second printed wiring structures. The interconnection structure comprises a plated hole pattern comprising a plurality of plated holes disposed in the first printed wiring structure. The holes in the first printed wiring structure have a concave cross section. A
plurality of bumps are disposed on the second printed wiring structure that are adapted to mate with the plurality of plated holes disposed in the first printed wiring structure. The holes formed in the first printed wiring board are disposed a predetermined depth below a surface of the printed wiring board, typically to a depth of between 0.007 inches and 0.020 inches below the surface. The plurality of plated holes are formed by electroless plating or electroplating of the holes.
Yet a further aspect of this invention is as follows:
An interconnection structure for use in interconnecting a plurality of printed wiring structures, said interconnection structure comprising: a plated hole pattern comprising a plurality of plated holes disposed in a first printed wiring structure comprising a printed wiring board having first and second opposing surfaces, wherein said plated holes have a surface having a concave cross section and said plated holes terminate at a depth ~5 2~ ~1 of between 0.007 to 0.020 inches below said first surface of said first printed wiring structure; and a plurality of bumps disposed on a second printed wiring structure that are adapted to mate with the plurality of plated holes disposed in the first printed wiring structure wherein said second printed wiring structure is selected from the group consisting of a printed wiring board and a flexprint circuit, said bumps being in the form of projections having metallic surfaces engageable with said plated holes, and wherein pressure applied to said first and second printed wiring structures brings said plated holes and said bumps into contact with each other along the entirety of said surface having a concave cross-section to establish said interconnection.
The present interconnection structure provides forhigh density interconnection of two printed wiring boards or a flexprint circuit and a printed wiring board. The present invention provides an interconnection structure that has relatively low cost, requires no soldering or wiring, provides for high reliability interconnections, uses no connectors, and is self aligning.
BRIEF DESCRIPTION OF THE DRAWINGS

The various features and advantages of the present invention may be more readily understood with reference to the following detailed description taken in conjunction with the accompanying drawings, wherein like reference numerals designate like structural elements, and in which:

Fig. 1 illustrates a cavity and bump interconnection structure for interconnecting two printed wiring structures in accordance with the principles of the present invention;

Fig. 2 shows an enlarged view of a cavity and a bump employed in the present invention prior to mating; and Fig. 3 shows an enlarged view of the cavity and bump of Fig. 2 after mating.

~ ~ 3~ 24 ~

DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to the drawing figures, Fig. 1 illustrates a cavity and bump interconnection structure 10 for interconnecting printed wiring structures 11, 16, 20 in accordance with the principles of the present invention.
The present interconnection structure 10 may be used to interconnect printed wiring structures 11, 16, 20 such as two printed wiring boards 11, 16, or a flexprint circuit 20 and a printed wiring board 11, for example. The printed wiring board 11 typically has a ground plane 14 disposed on one surface thereof.
To implement interconnection structure 10, cavities 13 are created by drilling 0.007 inch to 0.020 inch deep holes 13 into a first surface 18 of the printed wiring board 11. This creates hole patterns 12 on the printed wiring board 11, wherein the holes 13 have a concave cross section. The printed wiring board 11 has first and second opposing surfaces (18, 14) and the cavity 13 terminates between the two opposing surfaces, that is, the hole 13 is not a through-hole. The holes 13 are then electroless plated or electroplated with conductive material 15, such as copper or aluminum, for example.
After electroless or electroplating the conductive material 15 onto the surface 18, the holes 13 are ready for accepting mating bumps 17 or dimples 17 formed on a second printed wiring board 16 or a flexprint circuit 20.
Bumps 17 may be composed of dielectric material plated with metal.
The holes 13 of the plated hole pattern 12 are easily mated with the corresponding bumps 17 or dimples 17 disposed on the second printed wiring board 16 of flexprint circuit 20 by pressing them together with a predetermined amount of pressure, on the order of ten to fifteen pounds per square inch. This interconnection structure 10 thus provides for reliable and self aligning interconnection of the two printed wiring boards 11, 16 or a flexprint circuit 20 and printed wiring board 11.
The present interconnection structure 10 provides for high density interconnection of two printed wiring boards 11, 16 or a flexprint circuit 20 and a printed wiring board 11. The present invention provides an interconnection structure that has relatively low cost, requires no soldering or wiring, provides for high reliability interconnections, uses no connectors, and is self aligning.
To prove out the principles of the present invention, six panel assemblies were made with solder plating of both cavities 13 and bumps 17 to the respective printed wiring structures 11, 16. The assemblies have been tested for electrical continuity, and have undergone thermal and humidity tests. Test results indicate that the interconnection structure 10 has passed thermal cycling from -40~C to +90~C, and humidity and vibration tests specified by MIL-P-55110.
In addition, the interconnection structure 10 has passed 250 cycles of connect-interconnect tests without any appreciable changes in the resistivity thereof.
Thus there has been described a new and improved interconnection structure for use in electronic packaging that employs plated cavities and bumps. It is to be understood that the above-described embodiment is merely illustrative of some of the many specific embodiments that represent applications of the principles of the present invention. Clearly, numerous and other arrangements may be readily devised by those skilled in the art without departing from the scope of the invention.

Claims (3)

1. An interconnection structure for use in interconnecting a plurality of printed wiring structures, said interconnection structure comprising:
a plated hole pattern comprising a plurality of plated holes disposed in a first printed wiring structure comprising a printed wiring board having first and second opposing surfaces, wherein said plated holes have a surface having a concave cross section and said plated holes terminate at a depth of between 0.007 to 0.020 inches below said first surface of said first printed wiring structure; and a plurality of bumps disposed on a second printed wiring structure that are adapted to mate with the plurality of plated holes disposed in the first printed wiring structure wherein said second printed wiring structure is selected from the group consisting of a printed wiring board and a flexprint circuit, said bumps being in the form of projections having metallic surfaces engageable with said plated holes, and wherein pressure applied to said first and second printed wiring structures brings said plated holes and said bumps into contact with each other along the entirety of said surface having a concave cross-section to establish said interconnection.
2. The interconnection structure of claim 1 wherein the plurality of plated holes comprise an electroless plated conductive material.
3. The interconnection structure of claim 1 wherein the plurality of plated holes comprise an electroplated conductive material.
CA002135241A 1993-12-17 1994-11-07 Cavity and bump interconnection structure for electronic packages Expired - Fee Related CA2135241C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16834293A 1993-12-17 1993-12-17
US08/168,342 1993-12-17

Publications (2)

Publication Number Publication Date
CA2135241A1 CA2135241A1 (en) 1995-06-18
CA2135241C true CA2135241C (en) 1998-08-04

Family

ID=22611130

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002135241A Expired - Fee Related CA2135241C (en) 1993-12-17 1994-11-07 Cavity and bump interconnection structure for electronic packages

Country Status (6)

Country Link
US (1) US5525065A (en)
EP (1) EP0658960A3 (en)
JP (1) JP2825772B2 (en)
KR (1) KR950023254A (en)
CA (1) CA2135241C (en)
IL (1) IL111951A (en)

Families Citing this family (78)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5372512A (en) * 1993-04-30 1994-12-13 Hewlett-Packard Company Electrical interconnect system for a flexible circuit
US5620329A (en) * 1996-06-17 1997-04-15 General Motors Corporation Self-aligning electrical connective arrangement
SE516011C2 (en) * 1996-12-19 2001-11-05 Ericsson Telefon Ab L M Tightly packed electrical connectors
US6246548B1 (en) 1997-03-24 2001-06-12 Maxtor Corporation Mechanically formed standoffs in a circuit interconnect
US6114221A (en) * 1998-03-16 2000-09-05 International Business Machines Corporation Method and apparatus for interconnecting multiple circuit chips
US6172414B1 (en) 1998-04-28 2001-01-09 Trw Inc. Apparatus and method for snap-on thermo-compression bonding
SG75841A1 (en) 1998-05-02 2000-10-24 Eriston Invest Pte Ltd Flip chip assembly with via interconnection
US6406939B1 (en) 1998-05-02 2002-06-18 Charles W. C. Lin Flip chip assembly with via interconnection
TW522536B (en) 1998-12-17 2003-03-01 Wen-Chiang Lin Bumpless flip chip assembly with strips-in-via and plating
SG82591A1 (en) 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with solder via
SG82590A1 (en) 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with strips and via-fill
US6316737B1 (en) * 1999-09-09 2001-11-13 Vlt Corporation Making a connection between a component and a circuit board
US6402970B1 (en) 2000-08-22 2002-06-11 Charles W. C. Lin Method of making a support circuit for a semiconductor chip assembly
US6350633B1 (en) 2000-08-22 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
US6562657B1 (en) 2000-08-22 2003-05-13 Charles W. C. Lin Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint
US6660626B1 (en) 2000-08-22 2003-12-09 Charles W. C. Lin Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint
US6403460B1 (en) 2000-08-22 2002-06-11 Charles W. C. Lin Method of making a semiconductor chip assembly
US6436734B1 (en) 2000-08-22 2002-08-20 Charles W. C. Lin Method of making a support circuit for a semiconductor chip assembly
US6562709B1 (en) 2000-08-22 2003-05-13 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
US6551861B1 (en) 2000-08-22 2003-04-22 Charles W. C. Lin Method of making a semiconductor chip assembly by joining the chip to a support circuit with an adhesive
US6350632B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with ball bond connection joint
US6511865B1 (en) 2000-09-20 2003-01-28 Charles W. C. Lin Method for forming a ball bond connection joint on a conductive trace and conductive pad in a semiconductor chip assembly
US6350386B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Method of making a support circuit with a tapered through-hole for a semiconductor chip assembly
US6544813B1 (en) 2000-10-02 2003-04-08 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US6448108B1 (en) 2000-10-02 2002-09-10 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US7319265B1 (en) 2000-10-13 2008-01-15 Bridge Semiconductor Corporation Semiconductor chip assembly with precision-formed metal pillar
US7190080B1 (en) 2000-10-13 2007-03-13 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal pillar
US6492252B1 (en) 2000-10-13 2002-12-10 Bridge Semiconductor Corporation Method of connecting a bumped conductive trace to a semiconductor chip
US6872591B1 (en) 2000-10-13 2005-03-29 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with a conductive trace and a substrate
US6740576B1 (en) 2000-10-13 2004-05-25 Bridge Semiconductor Corporation Method of making a contact terminal with a plated metal peripheral sidewall portion for a semiconductor chip assembly
US7094676B1 (en) 2000-10-13 2006-08-22 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal pillar
US7264991B1 (en) 2000-10-13 2007-09-04 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using conductive adhesive
US6537851B1 (en) 2000-10-13 2003-03-25 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace to a semiconductor chip
US7132741B1 (en) 2000-10-13 2006-11-07 Bridge Semiconductor Corporation Semiconductor chip assembly with carved bumped terminal
US7075186B1 (en) 2000-10-13 2006-07-11 Bridge Semiconductor Corporation Semiconductor chip assembly with interlocked contact terminal
US6949408B1 (en) 2000-10-13 2005-09-27 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps
US7262082B1 (en) 2000-10-13 2007-08-28 Bridge Semiconductor Corporation Method of making a three-dimensional stacked semiconductor package with a metal pillar and a conductive interconnect in an encapsulant aperture
US7071089B1 (en) 2000-10-13 2006-07-04 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with a carved bumped terminal
US6876072B1 (en) 2000-10-13 2005-04-05 Bridge Semiconductor Corporation Semiconductor chip assembly with chip in substrate cavity
US6908788B1 (en) 2000-10-13 2005-06-21 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using a metal base
US7009297B1 (en) 2000-10-13 2006-03-07 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal particle
US6667229B1 (en) 2000-10-13 2003-12-23 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip
US7414319B2 (en) * 2000-10-13 2008-08-19 Bridge Semiconductor Corporation Semiconductor chip assembly with metal containment wall and solder terminal
US6440835B1 (en) 2000-10-13 2002-08-27 Charles W. C. Lin Method of connecting a conductive trace to a semiconductor chip
US6576539B1 (en) 2000-10-13 2003-06-10 Charles W.C. Lin Semiconductor chip assembly with interlocked conductive trace
US6984576B1 (en) 2000-10-13 2006-01-10 Bridge Semiconductor Corporation Method of connecting an additively and subtractively formed conductive trace and an insulative base to a semiconductor chip
US7129113B1 (en) 2000-10-13 2006-10-31 Bridge Semiconductor Corporation Method of making a three-dimensional stacked semiconductor package with a metal pillar in an encapsulant aperture
US6548393B1 (en) 2000-10-13 2003-04-15 Charles W. C. Lin Semiconductor chip assembly with hardened connection joint
US6699780B1 (en) 2000-10-13 2004-03-02 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using plasma undercut etching
US6673710B1 (en) 2000-10-13 2004-01-06 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip
US7129575B1 (en) 2000-10-13 2006-10-31 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped metal pillar
US6576493B1 (en) 2000-10-13 2003-06-10 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps
US6444489B1 (en) 2000-12-15 2002-09-03 Charles W. C. Lin Semiconductor chip assembly with bumped molded substrate
US6653170B1 (en) 2001-02-06 2003-11-25 Charles W. C. Lin Semiconductor chip assembly with elongated wire ball bonded to chip and electrolessly plated to support circuit
US6674647B2 (en) * 2002-01-07 2004-01-06 International Business Machines Corporation Low or no-force bump flattening structure and method
DE10304906A1 (en) * 2003-02-06 2004-09-16 Siemens Ag SMT-compatible component and circuit board as well as SMT processes
WO2004077525A2 (en) * 2003-02-25 2004-09-10 Tessera, Inc. Ball grid array with bumps
DE10324450A1 (en) * 2003-05-28 2005-01-05 Infineon Technologies Ag Contacting device for electronic circuit units and manufacturing method
US7993983B1 (en) 2003-11-17 2011-08-09 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with chip and encapsulant grinding
US7538415B1 (en) 2003-11-20 2009-05-26 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal, filler and insulative base
US7425759B1 (en) 2003-11-20 2008-09-16 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal and filler
US7404252B2 (en) * 2004-10-18 2008-07-29 International Business Machines Corporation Method for fastening two coplanar edges without a weld
US7750483B1 (en) 2004-11-10 2010-07-06 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar and enlarged plated contact terminal
US7268421B1 (en) 2004-11-10 2007-09-11 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar that includes enlarged ball bond
US7446419B1 (en) 2004-11-10 2008-11-04 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar of stacked metal balls
US7811863B1 (en) 2006-10-26 2010-10-12 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with metal pillar and encapsulant grinding and heat sink attachment
US7494843B1 (en) 2006-12-26 2009-02-24 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with thermal conductor and encapsulant grinding
US7785113B2 (en) 2006-10-27 2010-08-31 Asahi Denka Kenkyusho Co., Ltd. Electrical connection structure
KR101022912B1 (en) * 2008-11-28 2011-03-17 삼성전기주식회사 A printed circuit board comprising a metal bump and a method of manufacturing the same
TWI395279B (en) * 2009-12-30 2013-05-01 Ind Tech Res Inst Micro-bump structure
WO2012049087A2 (en) * 2010-10-13 2012-04-19 Abb Research Ltd Semiconductor module and method of manufacturing a semiconductor module
US9832887B2 (en) * 2013-08-07 2017-11-28 Invensas Corporation Micro mechanical anchor for 3D architecture
US10008797B2 (en) 2015-07-10 2018-06-26 Te Connectivity Corporation Flexible printed circuit connector and connector assembly including the same
US11495560B2 (en) * 2015-08-10 2022-11-08 X Display Company Technology Limited Chiplets with connection posts
US10468363B2 (en) * 2015-08-10 2019-11-05 X-Celeprint Limited Chiplets with connection posts
US10750614B2 (en) * 2017-06-12 2020-08-18 Invensas Corporation Deformable electrical contacts with conformable target pads
CN107741676A (en) * 2017-10-19 2018-02-27 武汉华星光电半导体显示技术有限公司 One kind coupling crimp type terminal structure and display device
WO2021184188A1 (en) * 2020-03-17 2021-09-23 元锦生物科技股份有限公司 Detachable joint structure

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3465435A (en) * 1967-05-08 1969-09-09 Ibm Method of forming an interconnecting multilayer circuitry
DE2947811C2 (en) * 1979-11-28 1983-06-16 Leopold Kostal GmbH & Co KG, 5880 Lüdenscheid Contact body
US4813129A (en) * 1987-06-19 1989-03-21 Hewlett-Packard Company Interconnect structure for PC boards and integrated circuits
US4940181A (en) * 1989-04-06 1990-07-10 Motorola, Inc. Pad grid array for receiving a solder bumped chip carrier
US5164336A (en) * 1989-09-11 1992-11-17 Nippon Steel Corporation Method of connecting tab tape to semiconductor chip, and bump sheet and bumped tape used in the method
US5121299A (en) * 1989-12-29 1992-06-09 International Business Machines Corporation Multi-level circuit structure utilizing conductive cores having conductive protrusions and cavities therein
US5071363A (en) * 1990-04-18 1991-12-10 Minnesota Mining And Manufacturing Company Miniature multiple conductor electrical connector
US5197184A (en) * 1990-09-11 1993-03-30 Hughes Aircraft Company Method of forming three-dimensional circuitry
JPH04142095A (en) * 1990-10-02 1992-05-15 Sharp Corp Connecting structure for member
JPH0467379U (en) * 1990-10-23 1992-06-15
US5147208A (en) * 1991-06-28 1992-09-15 Rogers Corporation Flexible printed circuit with raised contacts
JPH07105420B2 (en) * 1991-08-26 1995-11-13 ヒューズ・エアクラフト・カンパニー Electrical connection with molded contacts
EP0529577B1 (en) * 1991-08-26 1996-10-09 Hughes Aircraft Company Electrical test probe having shaped contacts
JPH05267811A (en) * 1992-03-17 1993-10-15 Fujitsu Denso Ltd Manufacture of printed circuit board connecting structure and connecting land
US5213511A (en) * 1992-03-27 1993-05-25 Hughes Aircraft Company Dimple interconnect for flat cables and printed wiring boards
US5245135A (en) * 1992-04-20 1993-09-14 Hughes Aircraft Company Stackable high density interconnection mechanism (SHIM)
US5342207A (en) * 1992-12-14 1994-08-30 Hughes Aircraft Company Electrical interconnection method and apparatus utilizing raised connecting means
US5288235A (en) * 1992-12-14 1994-02-22 Hughes Aircraft Company Electrical interconnects having a supported bulge configuration
US5326412A (en) * 1992-12-22 1994-07-05 Hughes Aircraft Company Method for electrodepositing corrosion barrier on isolated circuitry
US5372512A (en) * 1993-04-30 1994-12-13 Hewlett-Packard Company Electrical interconnect system for a flexible circuit

Also Published As

Publication number Publication date
IL111951A0 (en) 1995-03-15
EP0658960A3 (en) 1997-01-29
EP0658960A2 (en) 1995-06-21
IL111951A (en) 1998-02-22
US5525065A (en) 1996-06-11
CA2135241A1 (en) 1995-06-18
JPH07263830A (en) 1995-10-13
KR950023254A (en) 1995-07-28
JP2825772B2 (en) 1998-11-18

Similar Documents

Publication Publication Date Title
CA2135241C (en) Cavity and bump interconnection structure for electronic packages
US5759047A (en) Flexible circuitized interposer with apertured member and method for making same
CA2110891C (en) Electrical interconnects having a bulge configuration
US5199879A (en) Electrical assembly with flexible circuit
EP0373342B1 (en) Circuit board assembly and contact pin for use therein
US5244395A (en) Circuit interconnect system
US7497695B2 (en) Connection structure for printed wiring board
US4295184A (en) Circuit board with self-locking terminals
EP0159593B1 (en) Electrical connector and method for making the same
KR101353650B1 (en) Composite contact for fine pitch electrical interconnect assembly
EP0574715B1 (en) Method of forming a conductive end portion on a flexible circuit member
JP2620502B2 (en) Electrical interconnects and assemblies with helical contacts
US5046954A (en) Planar electrical connector
US5899757A (en) Compression connector
JP2003197299A (en) Surface mount rectanglular electric connector
US4107836A (en) Circuit board with self-locking terminals
KR20000064787A (en) IC socket
US4187388A (en) Circuit board with self-locking terminals
JPH0831527A (en) Connector for board
US5878487A (en) Method of supporting an electrical circuit on an electrically insulative base substrate
US6793501B1 (en) Electric components for printed boards and method for automatically inserting said components in printed boards
US4223435A (en) Circuit board with self-locking terminals
EP0792519B1 (en) Interconnection elements for microelectronic components
WO2000033427A1 (en) Controlling the heat expansion of electrical couplings
JPH0537108A (en) Printed wiring board including metal base plate

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed