CA2098216C - Information reproducing apparatus - Google Patents

Abstract

An information reproducing apparatus has: (1) a reference signal generating circuit for generating a first reference signal corresponding to a reproduced signal of main information; (2) a first switching circuit for selecting one of the reproduced signal and the first reference signal; and (3) a controller. The controller, which generates a selection-instructing signal, selects the reproduced signal during reproducing of the main information recorded area, and selects the first reference signal during reproducing of the main information unrecorded area. With this arrangement, when the main information unrecorded area is reproduced, the clock for carrying out the reproducing of main information is synchronized with the first reference signal, which corresponds to the reproduced signal. Thus, when the reproducing area is changed from the main information unrecorded area to the main information recorded area, the synchronizing with the reproduced signal is carried out quickly, thereby improving the reliability of the reproducing process.

Description

INFORMATION REPRODUCING APPARATUS

The present invention relates to an information-reproducing apparatus which reproduces recorded information from a recording medium such as a compact disk in which the recorded information such as digital audio signals and computer-use data are recorded.
A compact disk (hereinbelow referred to as a CD) has been widely used as a recording medium in which continuous information such as music information is digitally recorded in the form of minute pits which can be optically detected. A CD-ROM (Compact Disk Read Only Memory) has begun to be widely applied for recording not only music information but also digital information such as computer-use data, since the CD has a large recording capacity and good productivity. Hereinbelow the CD-ROM is also referred to as the CD for sake of convenience. The CDs are reproduced by an optical disk reproducing apparatus (CD player) which is used for reproducing only.
Figures 12 and 13 show the schematic signal format for use in the CD. As shown in Figure 12, one frame 50a of a recording signal is composed of: (1) a frame synchronization signal 50b indicative of a head end of the frame;

(2) a sub-code 50c indicative of an additional information for data; and (3) a data field 50d which is formed by adding 8-byte parity code to 24-byte data of main information. The 8-byte parity code is for correcting errors detected in the process. The data field 50d is formed based on an error-detection-and-correction system into which a non-completion-type interleave referred to as CIRC (Cross-lnterleaved Reed Solomon Code) is incorporated.
As shown in Figure 13, one sub-coding frame (hereinbelow referred to as sector) 51a is composed of 98 frames 50a. A sub-coding block 51c is composed of 98 sub-codes 50c of the respective frames 50a. The data of the sub-coding block 51c indicate the track number, which is referred to as a song number when the main information is the music information, and the absolute address on the disk.
The length of one sector is 13.3ms, which corresponds to 1/75 seconds. A sector number is expressed by the combination of "minute":

1~ ~

2~98216 "second": "a number of 0 to 74 within one second", the sector number being indicative of an assigned number on the disk. The sector number indicates both time information and position information, which respectively increase consecutively as the radial position on the disk becomes far away from the 5 innermost portion.
Figure 11 is a plan view showing the area arrangement on the CD.
A disk 52 has a main information recorded area 52b and a TOC (Table Of Contents) area 52a. Main information such as music information and the sector numbers derived from the sub-code area recorded in the main information 10 recorded area 52b. Additional information is recorded in the TOC area 52a, the additional information being derived from the sub-code with regard to each main information recorded in the main information recorded area 52b. The additional information includes each track number, the recording start sector number for each track, and information for identifying whether the main information 15 recorded in the track is audio information or computer-use data.
When the CD player is loaded with the CD having the above-mentioned format, the sub-code information is first read out of the TOC area 52a. According to the reading, the respective numbers of the main information (corresponding to the song numbers for the music information), the recording 20 start sector number for each main information, and the type (audio or data) of the recorded information are identified. When the reproduction instruction is received, the in~ormation of the TOC area 52a is compared with the sector number derived from the sub-code of the main information recorded area 52b.
According to this comparison, the reproducing operation with respect to a target25 track is immediately carried out, combined with the access operation.
The information is recorded in the CD based on the CLV (Constant Linear Velocity) method, in which the recording density is constant over the whole disk. This is preferable because it improves the recording capacity of theCD. The CD player rotates the CD at the constant linear velocity such that, for 30 example, the interval between the frame synchronization signals has a reference length. The frame synchronization signals are derived from the reproduced .

signal, which is reproduced from the recorded information in the CD based on the CLV method employing the above-mentioned signal format.
In contrast, when a variety of information such as music information and computer-use data are recorded and reproduced with respect to a rewritable disk such as a recently-developed magneto-optical disk, it is desirable to provide a compatible disk recording and reproduction apparatus which has a common reproduction system to both the CD and the magneto-optical disk.
In such case, especially in an initial disk wherein no information is recorded, (1) the access operation with respect to an arbitrary sector and (2) some means for carrying out the CLV control with respect to the main information unrecorded area are required prior to the recording. This is becausein the initial disk information there exists no absolute address using the above-mentioned sub-code and no frame synchronization signal used for the CLV
1 5 control.
As shown in Figure 14, in order to record an absolute address information which is equivalent to the absolute address information derived fromthe sub-code, there is proposed the following method. An information series, such as absolute address information and error detection and correction code, is subjected to "biphase-mark" modulation. Thereafter a guide groove 52c (indicated as hatched lines for sake of convenience), which is formed beforehand (pre-recorded) as pre-recorded information in a radial direction of the disk at a predetermined interval, is deviated to an outer side or to an inner side in a radial direction in response to the respective modulated bits "1" or "0"
(see U.S. Patent No. 4,907,216). The information reproducing apparatus can carry out the CLV control and the absolute address information detection with respect to the main information recorded area 52b of the rewritable recording medium (such as a magneto-optical disk) when the above-mentioned recording method is adopted.
Figure 9 is a block diagram showing an example of the information reproducing apparatus that uses the magneto-optical disk and is compatible with the above-mentioned CD format. A magneto-optical disk 61 is supported to be rotated by a spindle motor 62. A signal reproduced by an optical head 64 is amplified by a reproducing amplifier 65. A magneto-optical signal (Ps), which is changed into a binary condition, is outputted to both a first clock generating circuit 68 and a reproduced-data processing circuit 74.
The pre-recorded information is outputted by reproducing amplifier 65 to a pre-recorded-information detecting circuit 66. The pre-recorded-information detecting circuit 66 is composed of a band-pass filter and a PLL forexample, wherein a synchronized clock is generated by the PLL with respect to the pre-recorded information of the reproduced signal which is extracted by the band-pass filter. The clock synchronized with the pre-recorded information, which is formed by the biphase-mark modulation of the absolute address, is outputted to a CLV controlling circuit 63.
The CLV controlling circuit 63 compares the frequency of the synchronized clock of the pre-recorded-information detecting circuit 66 with a reference frequency, within the circuit 63, which is synchronized with a clock of a second clock generating circuit 70 (later described). The CLV controlling circuit 63 controls the spindle motor 62 in response to the frequency difference, thereby carrying out accurate CLV control with respect to the unrecorded area, where no main information is recorded.
The pre-recorded information of the reproduced signal which is extracted by the pre-recorded-information detecting circuit 66 is supplied to anaddress-detecting circuit 67, which is composed of a biphase-mark demodulation circuit and an address decoder circuit. The address-detecting circuit 67 carries out the biphase-mark demodulation with respect to the pre-recorded information which is extracted by the pre-recorded-information detecting circuit 66. The demodulated pre-recorded information is decoded into position information on the disk, i.e. the absolute address (equal to the sector), by the address decoder circuit so as to be supplied to a controller 75.
A reproduced-data processing circuit 74 carries out the removal of the frame synchronization signal from the binary magneto-optical signal (Ps) and 209~216 carries out EFM (Eight-to-Fourteen Modulation) demodulation so as to remove sub-code information. The removed signals are supplied to the controller 75.
The reproduced-data processing circuit 74 also writes the main information and the parity as reproduced data to a memory 73 so that an error-correcting operation can be carried out based on the CIRC.
The controller 75 receives a reproducing instruction from a host device through a terminal 79 and an interface 78. The controller 75 has an access function. According to the access function, the controller 75 identifies where the optical head 64 is located on the disk upon reception of the absolute address information from the address-detecting circuit 67 and the optical head is moved to a target position by use of an optical head moving mechanism (not shown). The controller 75 also identifies the sub-code information of the reproduced-data processing circuit 74.
Regarding the clock system which processes the reproduced data, a clock synchronized with the reproducing signal is used for writing the reproduced signal which has been subjected to the EFM demodulation. The EFM-demodulated data are written to the memory 73 in the following manner:
(1) the memory address is supplied to the memory 73 through a switching circuit 72, the memory address being generated by a write-address-generating circuit 69 responsive to the clock of the first clock generating circuit 68; and, (2) the EFM-demodulated data are written to the memory 73 in accordance with the supplied memory address in a predetermined sequence.
In contrast, the data are read from the memory 73 in the following manner: (1) the memory address is supplied to the memory 73 through the switching device 72, the memory address being generated by a read-address-generating circuit 71 responsive to a reference clock of a second clock generating circuit 70; and, (2) the data are read from the memory 73 in accordance with the supplied memory address in a predetermined sequence.
In this way, the data corresponding to the main data in Figure 13 is converted into analog audio information so as to be output through a terminal77 or so as to be output to the host device which is connected with the terminal 2~98~6 79 through the interface 78. The address-generating sequence of the write-address-generating circuit 69 is not the same as that of the read-address-generating circuit 71. The respective address-generating circuits 69 and 71 alsocarry out a de-interleave by which data, arranged based on an interleave during recording of the disk, are relocated as original data.
The continuous reproducing is carried out by controlling the spindle motor 62 in a minute manner such that the period of the frame synchronization signal of the reproduced signal coincides with the reference period of the second clock generating circuit 70, thereby avoiding overload of the recording capacity of the limited memory 73. When the overload of the memory 73 occurs in the recording capacity, a setting operation is carried out in order to avoid the destruction of the data which are already written. The read address is set as the write address when it is detected that the difference between the write address and the read address is exceeded by an amount corresponding to + nf frames (referred to as jitter margin or so).
The information reproducing apparatus is arranged such that the reference clock, which is different from the clock synchronized with the reproduced data, is used as the address generating-use clock of the read-address-generating circuit 71. This results in the fluctuation of the disk rotation system, which is contained in the reproduced signal, being absorbed.
Accordingly, high-fidelity audio reproduction can be achieved without time-base fluctuation. This is generally called TBC (Time Base Correcting), which is a superior feature of the digital audio device.
However, unlike with reproduction of continuous information, in the information reproducing apparatus which uses the above-mentioned recordable disk, when the computer data, text data, compressed digital audio information, or image information are reproduced, the number of the sector to be reproduced becomes discrete and the unrecorded area of the main information is distributed over the whole disk. This creates the following problems.
Figure 10 is a time chart illustrating the problem when the CD
format is adapted to the recordable disk. It shows operation wherein the disk is normally rotating at a predetermined linear velocity, and at the time (t17) atemporary fluctuation in disk rotation occurs due to a disturbance such as a mechanical shock. Note that the following explanation does not include, for ease of explanation, the address generation for the error correction, as in like5 Figure 9.
Figure 10 shows the reproducing operation where the recording information such as the computer-use coding data are stored over five sectors between sector address (n) through (n+4) with respect to a sector address (a) on the disk having the unique absolute address indicated by the pre-recorded 10 information. A disk reproduced signal (b) is delayed by (df) with respect to the corresponding respective sector head ends. The delay amount (df) is determined based on the delay due to the coding and decoding of the CIRC.
Sector addresses (n-1), (n+5), and (n+6), which correspond to the sectors other than the above-mentioned five sectors, are information unrecorded 15 areas. The disk reproduced signal (b) is changed into a binary signal (c) by use of a comparator or other device. In the information unrecorded areas of sector addresses (n-1), (n+5), and (n+6), the disk reproduced signal (b) becomes a noise level. The corresponding areas C1 and C3 have meaningless data which contains high-frequency components. Accordingly, the PLL for generating the 20 first clock which is synchronized with the disk reproduced signal (b) tries to follow the binary signal (c) and carries out an operation as in (d).
More specifically, the ordinate axis of Figure 1 O(d) represents the locking range frequency of i~f1. The reproducing clock is a high frequency in the area C1 of the information unrecorded area, and the PLL pull-in operation 25 is carried out at the time (t13) in the information recorded area C2, where the reproduction is carried out. At the time (t17), the rotating system receives a disturbance such as a mechanical shock to the information reproducing apparatus, and follows the disturbance. When the area C3 is reproduced at the time (t20), the PLL slips, thereby generating a clock having a high frequency.
30 Accordingly, a locking signal (e) indicative of the PLL pull-in states shows a locking state during the time period between (t14) and (t20).

6 ~

2098~1~

Corresponding to the above-mentioned TBC operation, the first clock synchronized with the reproduced signal is used as the memory writing-use clock while the constant second clock is used as the memory reading-use clock. This results in an address difference (fl between the write address and 5 the read address gradually increasing from the time (t10). The address difference (fl exceeds the jitter margin (+nfl for the memory 73 at the time (t1 1 );
at that time the write-address-setting operation is carried out in accordance with the address set (g). Afterwards, the normal reproducing operation is carried outwhen the address difference falls within the jitter margin (+nfl. However, at the 10 time (t18); the address difference exceeds again the jitter margin (+ nfl due to the inflection of the small disturbance occurring at the time (t17), thereby again carrying out the write-address-setting operation.
Accordingly, an error flag (h) indicative of the error-corrected results, corresponding to the above-mentioned reproducing example, is correct 15 at the time (t16); however, the error flag (h) is in the error state at the time (t18) when the write-address-setting operation is carried out. Therefore, the reproducing operation having the original jitter margin does not happen upon reception of a small disturbance, thereby decreasing the reliability of the reproduction operation. Note that the error flag (h) indicates the corrected 20 results by the CIRC, and is released followed by the interleave delay corresponding to one sector or more.
Further, as is clear from the above-mentioned example, the first clock generating frequency is much higher than the normal frequency fc for the area C1 of the information unrecorded area. This presents the problem that 25 reliability in reading the head end of the start position for reproduction isreduced, since it takes a long time to carry out the PLL pull-in operation from the time (t13) of the entry of the sector data to be reproduced.
It is an object of the present invention to provide an information reproducing apparatus which can carry out the PLL pull-in operation in a short 30 time without inflection due to disturbance when the reproducing area is changed from a main information unrecorded area to a main information recorded area.

209821~

In order to achieve the foregoing object, the present invention is directed to an information reproducing apparatus for reproducing main information from a desired area of a recording medium based on the identification between main information recorded area and main information unrecorded area, in accordance with address information which is pre-recorded on the recording medium.
The information reproducing apparatus has: (1) reference signal generating means for generating a first reference signal corresponding to a reproduced signal of the main information; (2) selecting means for selecting oneof the reproduced signal and the first reference signal which are entered to theselecting means; (3) controlling means, which generates a selection-instructing signal in response to the address information, for controlling the selecting means such that the reproduced signal is selected during reproducing of the main information recorded area while the first reference signal is selected during reproducing of the main information unrecorded area, in accordance with the selection-instructing signal; and (4) reproduced signal processing means, which is connected with the selecting means and generates a clock synchronized with the output of the selecting means, for carrying out reproducing of the main information in response to the generated clock.
With this arrangement, identifying between the main information recorded area and the main information unrecorded area is carried out in accordance with the address information which is pre-recorded on the recording medium. The reproduced signal processing means carries out the synchronizing with respect to the reproduced signal in a short time when the reproducing area is changed from the main information unrecorded area to the main information recorded area. This is because the clock for carrying out the reproducing of main information is synchronized with the first reference signal,which corresponds to the reproduced signal, during the reproducing of the main information unrecorded area.
The controlling means may have (a) timing generating means for generating a timing signal for each synchronizing signal of the address information, and (b) synchronization means, which identifies between a start position and an end position of the main information recorded area according to the timing signal, for synchronizing the selection-instructing signal with the timing signal. With this arrangement, the timing of a change from the main information unrecorded area to the main information recorded area can be identified with accuracy, since the start and end positions of the main information recorded area are identified according to the timing signal for eachsynchronizing signal of the address information and since the selection-instructing signal is synchronized with the timing signal. This greatly improvesthe reliability of the reproducing process.
Alternatively, identifying between the main information recorded area and the main information unrecorded area may be done in response to a detecting signal, which is derived from the signal condition of the reproduced signal from the recording medium. In such case, synchronizing with respect to the reproduced signal is also carried out in a short time when the reproducing area is changed from the main information unrecorded area to the main information recorded area.
The reference signal generating means may have oscillating means for outputting a clock having a frequency of a predetermined multiple of an audio sampling frequency. In this case, the first reference signal is synthesized so as to alternate between a signal 23 clock periods long and a signal 2~ clock periods long. With the arrangement, it is not necessary to separately provide oscillating means for generating the first reference signal in an information reproducing apparatus for reproducing only.
Moreover, instead of the reference signal generating means, recording signal processing means may be adopted. The recording signal processing means processes externally-entered recording information for conversion into a recording signal having a signal format suitable for the recording medium character; the converted signal is outputted as the recording signal. In such case, the recording signal corresponds to the first reference signal. With the arrangement, it is not necessary to separately provide an exclusive means for generating the first reference signal, thereby decreasing a burden on the circuit.
The further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it 5 should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit andscope of the invention will become apparent to those skilled in the art from this detailed description.
The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus, are not limitative of the present invention:
Figure 1 is a block diagram of a first embodiment of an information reproducing apparatus in accordance with the present invention;
Figure 2 is an instructing routine flow chart of an information reproducing operation in accordance with the present invention;
Figure 3 is a diagram of the signals produced during the information reproducing;
Figure 4 is a block diagram of a main portion of the internal structure of a controller;
Figure 5 is a diagram of a first reference signal;
Figure 6 is a block diagram of a reproduced signal detecting circuit;
Figure 7 is a block diagram of a second embodiment of an information reproducing apparatus in accordance with the present invention;
Figure 8 is a block diagram of a third embodiment of an information reproducing apparatus in accordance with the present invention;
Figure 9 is a block diagram of a conventional information reproducing apparatus;

~098216 Figure 10 is a diagram of signals during the information reproducing of the information reproducing apparatus of Figure 9;
Figure 11 is a schematic plan view of a compact disk;
Figure 12 is a depictive illustration of a format of a frame signal of 5 the disk;
Figure 13 is a depictive illustration of a sector format of the compact disk; and, Figure 14 is an enlarged plan view of the main portion of a magneto-optical disk.
The following description deals with the first preferred embodiment of the present invention, with reference to Figures 1 through 5.
As shown in Figure 1, the information reproducing apparatus of the present embodiment has a spindle motor 7 for rotatably supporting a magneto-optical disk 1, and has an optical head 3 for projecting the laser light onto the 15 magneto-optical disk 1 and for outputting a reproduced signal which varies depending on lthe reflected light from the magneto-optical disk 1. The reproduced signal of the optical head 3 is sent to a reproducing amplifier 4. The reproducing amplifier 4 amplifies the reproduced signal, and outputs a binary magneto-optical signal Ps to both a first switching circuit 10 and to a pre-20 recorded-information detecting circuit 5.
The pre-recorded-information detecting circuit 5 is composed, for example, of a band-pass filter and a PLL (Phase-Locked Loop). A clock synchronized with the pre-recorded information of the reproduced signal extracted by the band-pass filter is generated by the PLL. A CLV controlling 25 circuit 6 is connected with the pre-recorded-information detecting circuit 5. A
clock is synchronized with the pre-recorded information, which is formed based on the biphase-mark modulation of the absolute address and is supplied to the CLV controlling circuit 6.
The CLV controlling circuit 6 compares the frequency of the 30 synchronizing clock of the pre-recorded-information detecting circuit 5 with a reference frequency which is synchronized with a clock of a second clock generating circuit 14 (later described). The CLV controlling circuit 6 controls the spindle motor 7 in response to the frequency difference of the comparison, thereby carrying out the CLV control with accuracy.
The pre-recorded information of the reproduced signal, which is 5 extracted by the pre-recorded-information detecting circuit 5, is supplied to an address detecting circuit 8 which is composed of a biphase-mark demodulation circuit and an address decoder. The address detecting circuit 8 carries out the biphase-mark demodulation with respect to the pre-recorded information. The demodulated pre-recorded information is decoded by the address decoder so 10 as to detect a sector synchronizing signal, so as to decode the absolute address information, and so as to detect the error. The resultant signals are supplied to a controller 9 (controlling means).
The first switching circuit 10 is a selecting means for switching an entered signal in response to a selection-instructing signal SEL. The first 15 switching circuit 10 receives the binary magneto-optical signal Ps from the reproducing amplifier 4, and receives a first reference signal Ss from a reference signal generating circuit 13 (reference signal generating means) whichis later described. The first switching circuit 10 selects one of the signals Psand Ss, and outputs the selected one to a first clock generating circuit 11 20 (reproduced signal processing means) and to a reproduced data processing circuit 18 (reproduced signal processing means).
The first clock generating circuit 11 generates a write-address generating-use clock fw, which is synchronized by the reproduced signal PLL, with respect either to the binary magneto-optical signal Ps in the reproduced 25 signal or to the first reference signal Ss. The clock fw is supplied to a write-address generating circuit 12 (reproduced signal processing means), and the reproduced signal PLL clock for the EFM demodulation is supplied to the reproduced data processing circuit 18.
The second clock generating circuit 14 generates a read-address 30 generating-use reference clock fr that is output to a read-address generatingcircuit 15 (reproduced signal processing means). The second clock generating circuit 14 also generates a reference-signal generating-use clock that is outputto the reference-signal generating circuit 13. The reference-signal generating circuit 13 generates the first reference signal Ss, corresponding to the main information on the magneto-optical disk 1, in response to the reference clock ofthe second clock generating circuit 14.
The first reference signal Ss is ideally a signal, without time-base fluctuation, to which the EFM processing has already been subjected. However, a reference signal having a single frequency which coincides with a channel bit rate of the EFM signal may be the first reference signal Ss, since the object isto fix the reproduced signal PLL frequency in the first clock generating circuit 11 at the center frequency, i.e., the normal frequency fc.
In particular, the information reproducing apparatus for reproducing only usually adopts a quartz (oscillating means) having a frequency of 16.9344MHz as a master clock of the system; this frequency is 384 times the audio sampling frequency (44.1kHz). However, there is no such multiple relationship between the frequency of 16.9344MHz and the channel bit rate frequency (4.3218MHz), since the ratio therebetween is 1:3.918---. So, a reference signal like Figure 5 may be assigned.
More specifically, the reference signal of Figure 5 is synthesized so as to alternate between: (1) a signal (fa) equal to 24 periods of the master clock (i.e., a signal having a length T1 which corresponds to 24 counts of the master clock) and (2) a signal (fb) equal to 23 periods of the master clock (i.e., a signal having a length T2 which corresponds to 23 counts of the master clock).
During the period of (fa), the frequency of the signal (fa) is:
(16.9344MHz/(24+24)) = 352.8kHz During the period of (fb), the frequency of the signal (fb) is:
(16.9344MHz/(23+23)) . 368.14kHz The average frequency (fave) is:
(16.9344MHz/(23+24)) . 360.31 kHz The average frequency (fave) has an error of mere 0.1 percent of a 6-channel bit-repetitive signal in the EFM signal, i.e., (4.3218 MHz/(6+6)) =
360.15 kHz. So, the signal having the average frequency (fave) may be adopted as the reference signal which complies with the above-mentioned object, without using a separate quartz oscillator.
In contrast, in response to the reproduced PLL clock generated by the first clock generating circuit 11, the reproduced data processing circuit 18:(1) separates the frame synchronizing signal from the binary magneto-optical signal Ps selected by the first switching circuit 10; (2) carries out the EFM
demodulation so as to extract sub-code information; (3) generates a lock detecting signal of the reproduced-signal PLL based on the monitoring of the detecting states of the frame synchronizing signal, that lock detecting signal being sent to the controller 9; and, (4) writes the main information and the parity as reproduced data to a memory 17, and carries out the reproducing processing, i.e., the error-correcting operation based on the CIRC, in response to the reproduced data.
The writing of the reproduced data to the memory 17 is carried out as follows, as in the earlier-mentioned conventional manner. More specifically, a memory address, which is generated by the write-address generating circuit 12, is supplied to the memory 17 through a second switching circuit 16 (reproduced signal processing means), and thereafter the writing is carried out in a predetermined sequence in combination with the operation of the reproduced data processing circuit 18. The error-correcting operation of the reproduced data which is written to the memory 17 and the reading of the corrected reproduced data, and the outputting thereof, are carried out in a predetermined sequence in combination with the operation of the reproduced data processing circuit 18. This takes place when the memory 17 receives the memory address generated by the read-address generating circuit 15 through the second switching circuit 16. In such case, when the respective addresses are generated, the address operation with respect to the memory 17 can be carried out at any time in response to the instruction from the controller 9.

20-g8~16 The reproduced data of the memory 17 which is error-corrected by the reproduced data processing circuit 18 is converted into the analog audio signal by a D/A converter 19. Thereafter, the analog audio signal is output to the outside, or is output to a host device which is connected with a terminal 225 through an interface 21.
The controller 9 receives an instruction for reproducing a desired sector from the host device through the terminal 22 and the interface 21. The controller 9 identifies the position on the magneto-optical disk 1 of the optical head 3, and controls an optical-head-moving mechanism (not shown) so as to 10 move the optical head 3 to the desired position, i.e., the controller 9 has an access function. The controller 9 also identifies the sub-code information supplied from the reproduced data processing circuit 18. The controller 9 further gives the selecting instruction to the first switching circuit 10, and gives the address operating instruction to both the read-address generating circuit 1515 and the write-address generating circuit 12.
Figure 4 is a block diagram showing one example of the section which generates the selection-instructing signal SEL, which is output to the first switching circuit 10. The controller 9 has a sector-timing-generating circuit 91, a flip-flop 92, and a microprocessor 93. The microprocessor 93 receives the 20 address information ADRS from the address-detecting circuit 8. The sector-synchronizing signal SYNC is supplied to the sector-timing-generating circuit 91.
The sector-synchronizing signal SYNC, which is located at the head end of each sector, is output from each sector. The sector-timing-generating circuit 91, to which the sector-synchronizing signal SYNC is entered,25 outputs after a predetermined delay period a sector timing pulse to a clock terminal of the flip-flop 92. In contrast, a switch-instructing signal from the microprocessor 93 is entered to a data input of the clock terminal of the flip-flop 92. With this arrangement, the selection-instructing signal SEL for the first switching circuit 10 is formed such that the switch-instructing signal from the 30 microprocessor 93 is synchronized by the sector-timing pulse.

.= =
~ ~.
~ ~ , 209821~

The following description deals with an example where the information-reproducing apparatus of Figure 1 reproduces a desired area of the recording medium, as in the conventional case mentioned earlier; it has reference to the flow chart of Figure 2 and the time chart of Figure 3.
Figure 2 is a flow chart showing one example of the instruction flow of a routine in the controller 9 of the information-reproducing apparatus in accordance with the present embodiment; the routine relates to both the memory-address operating instruction and the switching instruction of the first switching circuit 10.
When the controller 9 receives an instruction for reproducing five sector areas of sector addresses (n) through (n+4) at S1, the controller 9 controls the first switching circuit 10 such that the first reference signal Ss is selected (S2). Thereafter, the controller 9 identifies the absolute address information from the address-detecting circuit 8 (S3), and judges whether it is the reproducing-start address ((n-1) is regarded as the start address since reproducing should be started from the sector address (n) according to the present embodiment). The processing is not carried out, i.e., S3 or S4 continues to be carried out, until the reproducing start address is identified (S4).
The controller 9 gives the switching instruction such that the binary magneto-optical signal Ps is output from the first switching circuit 10 upon identification of the sector address (n-1) at S5. Thereafter, the controller 9 judges whether the reproduced signal PLL of the first clock generating circuit 11 is in the locking state according to the PLL lock-detecting signal from the reproduced data processing circuit 18 (S6). When the reproduced signal PLL
is in the locking state, the operating instruction of the memory address is supplied to both the write-address generating circuit 12 and the read-address generating circuit 15 (S7). Instead of the PLL locking state judgement of S6 and S7, elapse of a predetermined time period may be adopted.
Thereafter, the absolute address is identified (S8), and it is judged whether the sector address is the reproducing end address, i.e., the sector address (n+4) at S9. The first reference signal Ss is output from the first 209~216 switching circuit 10 upon identification of the reproducing end address (S10), thereby ending the reproducing operation (S11).
Figure 3 is a time chart showing the reproducing operation corresponding to the above-mentioned instructing routine, i.e., it shows the 5 reproducing operation in the case where recording information such as computer-use coding data is stored over five sectors (between the sector addresses (n) through (n+4) of the sector address (a) on the magneto-optical disk 1). The sector address (a) has the respective unique absolute address defined by the pre-recorded information.
A disk reproduced signal (b) is delayed by (dfl with respect to the sector head end of each sector address (a). Respective sector addresses (n-1), (n+5), and (n+6) relate to sectors that are in information unrecorded areas. A
binary reproduced signal (c) is formed by a comparator or other device in response to the disk reproduced signal (b). In the sectors with addresses (n-1),15 (n+5), and (n+6) in the information unrecorded areas, the disk reproduced signal (b) is equal to a noise level. The respective areas C1 and C3 of the corresponding binary reproduced signal (c) have meaningless data containing high-frequency components.
Since the time period between (t1) and (t6) corresponds to the 20 areas to be reproduced, during that time period the switch instructing signal (d) is supplied from the controller 9 in accordance with the flow chart. The switching of the first switching circuit 10 is carried out in response to a selection-instructing signal (g), which is synchronized by a sector-timing pulse signal (fl.
The sector-timing pulse signal (fl is generated by a sector-address 25 synchronizing signal (e), which is supplied from the address-detecting circuit 8 to the controller 9.
In this case, the sector timing pulse (fl is delayed by ((t3) - (t1)), which is equal to the delay time of (dfl added to the time corresponding to a predetermined error. Accordingly, the output of the first switching circuit 10 30 changes so as to be the first reference signal Ss during the time period of (h1), i.e. between (tO) and (t3), and so as to be the binary magneto-optical signal Ps .~

during the time period (h2) and (h3), i.e. between (t3) and (t8), and so as to be the first reference signal Ss during the time period of (h4), i.e. following (t8).
As shown in Figure 3(i), the corresponding reproduced-signal PLL-generating frequency of the first clock generating circuit 11 is the normal frequency fc synchronized with the first reference signal Ss during the time period between (tO) and (t3). Just after the time (t3), there occurs an instantaneous disturbance due to the switching operation of the first switching circuit 10. However, the reproduced-signal PLL-generating frequency is scarcely changed, and closely follows the binary magneto-optical signal Ps.
And, the reproduced-signal PLL-generating frequency follows a temporary rotational fluctuation of the magneto-optical disk 1 due to the mechanical shockat the time (t5). Thereafter, the frequency becomes temporarily high in response to the high-frequency reproduced signal, corresponding to the information unrecorded areas for a predetermined time period of (h3) after the time (t7). However, the reference follows again the normal frequency fc in response to the first reference signal Ss after the time (t8).
Note that a locking signal a) indicates the locking state of the reproduced signal PLL. Since the reproduced signal is not the normal EFM
signal during the time period between (tO) and (t3) when the first reference signal Ss is selected, the locking signal a) indicates the unlocked state. In contrast, the locking signal a) indicates the locking state at the time (t4) that follows shortly after the time (t3) when the normal EFM signal is entered. The locking signal a) indicates again another unlocked state at the time (t7), when the entering of the normal EFM signal is finished.
When corresponding to the TBC operation, the first clock synchronized with the reproduced signal is used as a clock for the memory writing while the second clock having a constant frequency is used as a clock for the memory reading. Accordingly, the address difference (k) between the write address and the read address keeps a predetermined address difference during the time period between the times (tO) and (t4). At the time (t4), the address operation is carried out by the controller 9, as in Figure 3(1), such that .~

~ 2~98216 the address difference becomes zero, thereby maximizing the jitter margin. The address difference of the maximum jitter margin can suppress the occurrence of the data overflow, since the disturbance at the time (t5) is kept within the deviation of the jitter margin. Thus, an error flag (m) of the reproducing 5 example, indicative of the corrected results by the CIRC and released before the interleave delay corresponding to one sector or more, can avoid an error occurring due to the disturbance at the time (t5).
As is clear from the above-mentioned example, the situation is avoided where the first clock generating frequency becomes much higher than 10 the actual normal frequency fc. Accordingly, the pull-in operation of the reproduced-signal PLL, which starts from the time (t4) when the sector data to be reproduced are entered, is carried out quickly, thereby improving the reliability of the reading of the reproducing head end position.
The present embodiment deals with the case where the 15 information-reproducing apparatus uses the type of rewritable disk which is compatible with the CD. The present invention is, however, not limited to the format used above. More specifically, the present invention can be adapted to another type of information-reproducing apparatus which uses a recording medium having absolute addresses assigned even with respect to main 20 information unrecorded area. The absolute address has no specific requirements, provided that the information is pre-recorded and can be identified.
The present embodiment deals with the case where the magneto-optical disk-shaped recording medium is used. However, the present invention 25 is not limited to such recording medium. More specifically, the present invention can be adapted to an information-reproducing apparatus which uses other kinds of rewritable recording media and write-once-type recording media. The present invention is not limited to the disk-shaped recording medium. More specifically,the recording medium of the present invention may be a card-type recording 30 medium or a tape-type recording medium, provided that such recording medium falls within the scope of the present invention.

.~

The following description deals with the second embodiment of the present invention with reference to Figures 6 and 7. Note that Figure 7 is a block diagram showing an information-reproducing apparatus wherein the same reference numerals are assigned for the same members as those of Figure 1 5 of the first embodiment.
The information-reproducing apparatusofthesecond embodiment, as shown in Figure 7, is distinguished over the first embodiment in that the selection-instructing signal SEL for selecting the output of the first switchingcircuit 10 is generated by a reproduced-signal detecting circuit 23 (reproduced-10 signal detecting means). More specifically, the reproduced-signal detecting circuit 23, as shown in Figure 6 for example, has (1) a peak-hold circuit 23a for holding the peak level of an entered binary magneto-optical signal Ps for a predetermined time period, the time period corresponding to the longest bit of the EFM signal, and for outputting the peak-hold signal; (2) a LPF (Low-Pass 15 Filter) 23b for removing the high-frequency component of the output of the peak-hold circuit 23a so as to form an envelope-detection signal; (3) a binary circuit 23c for converting the envelope-detection signal into a binary signal so as to form the selection-instructing signal SEL of the first switching circuit 10 and other circuits. When the binary magneto-optical signal Ps is entered to the LPF
20 23b, the high-frequency components contained in the reproduced signal (corresponding to the reproduced signal of the main information unrecorded area) are removed, thereby extracting only the reproduced signal of the main information recorded area. More specifically, an identification is made in accordance with the reproduced signal as to whether the main information 25 recorded area is reproduced or the main information unrecorded area is reproduced .
Thus, according to the information-reproducing apparatus of the present embodiment, the reproduced-signal detecting circuit 23 outputs the selection-instructing signal SEL with nearly equal timing to that of Figure 3(g)30 in correspondence to the disk reproduced signal (b). This results in the same ~ 2~98216 effect as that of the first embodiment. The foregoing explanation is made based on the time chart of Figure 3 of the first embodiment.
Note that a controller 24 of the second embodiment corresponds to a structure which excludes the hardware and flow chart, relating to the 5 generation of the selection-instructing signal SEL, from the structure of Figures 1 and 2 of the first embodiment.
The following description deals with the third embodiment of the present invention with reference to Figure 8. Note that Figure 8 is a block diagram showing an information-reproducing apparatus wherein the same 10 reference numerals are assigned for the same members as those of Figure 1 of the first embodiment.
The information-reproducing apparatus of the present embodiment, as shown in Figure 8, has a recording function. More specifically, when analog audio information is externally entered through a terminal 32 during the 15 recording operation, an A/D converter 31 converts it into digital form so it may be written to a memory 31. The CIRC coding and the adding of the sub-code information are carried out by a recording data processing circuit 33 (recordinginformation processing means) with respect to the digital audio data read from the memory 30, and thereafter it is outputted to a magnetic head driver 34 as 20 the recording signal to which the EFM frame-synchronized signal is added. Themagnetic head driver 34 drives a coil 35 in response to the entered EFM
recording signal such that the magnetic field is applied to the position which is opposite to an optical head 25. The application of the magnetic field combined with projection of a beam having recording-use light intensity by optical head 25 25 is used to record information.
As to the address generation of the memory 30, corresponding to the above-mentioned recording operation, the write address is generated by a write-address generating circuit 27 through a third switching circuit 26 by use of a reference clock of the second clock generating circuit 14. The read 30 address is generated by a read-address generating circuit 29 by use of the reference clock of the second clock generating circuit 14. The respective 209821~

addresses are switched by a second switching circuit 28 so as to be supplied to the memory 30.
In contrast, as to the reproducing operation, the present embodiment distinguishes over the first embodiment in that one of the entries 5 to the first switching circuit 10 is different, i.e., the recording data processing circuit 33 is provided for processing externally-entered recording information for conversion into a recording signal having a signal format suitable for the recording medium character, that converted signal being output. More specifically, the recording data processing circuit 33 outputs the recording signal 10 even during the reproducing. The recording signal of the recording data processing circuit 33 is used as the first reference signal according to the present embodiment.
Therefore, it is not necessary to separately provide an exclusive circuit for the first reference signal which substitutes for the reproduced signal 15 of the information unrecorded area on the magneto-optical disk 1 according tothe information-reproducing apparatus of the present embodiment; this thereby decreases the burden on the circuit.
The information-reproducing apparatus of the present invention, as mentioned above, has an arrangement such that a main information recorded 20 area and a main information unrecorded area are identified in accordance withthe address information which is pre-recorded on the recording medium, and such that the first reference signal is selected during the reproducing of the main information unrecorded area while the reproduced signal is selected during the reproducing of the main information recorded area. Therefore, when the 25 main information unrecorded area is reproduced, the clock for carrying out the reproducing of main information is synchronized with the first reference signal,which corresponds to the reproduced signal during the reproducing of the main information unrecorded area. So, when the reproducing area is changed from the main information unrecorded area to the main information recorded area, the 30 synchronizing with the reproduced signal is carried out quickly, thereby improving the reliability of the reproducing process.

~ 2098216 Alternatively, identifying between the main information recorded area and the main information unrecorded area may be done in response to the reproduced signal from the recording medium. In such case, the synchronizing with the reproduced signal is also carried out quickly when the reproducing area5 is changed from the main information unrecorded area to the main information recorded area, since the clock for carrying out the reproducing of main information is synchronized with the first reference signal, which corresponds to the reproduced signal during the reproducing of the main information unrecorded area. This improves the reliability of the reproducing process.
Instead of the reference signal generating means, recording signal processing means may be adopted. The recording signal processing means processes externally-entered recording information, converting it into a recording signal having a signal format suitable for the type of recording medium; the converted signal is output. In such case, the recording signal corresponds to 15 the first reference signal. With this arrangement, it is not necessary to separately provide an exclusive means for generating the first reference signal;the burden on the circuit is thereby reduced.
There are described above novel features which the skilled man will appreciate give rise to advantages. These are each independent aspects 20 of the invention to be covered by the present application, irrespective of whether or not they are included within the scope of the following claims.

Claims (25)

1. An information reproducing apparatus for reproducing main information from a desired area of a recording medium based on identification between a main information recorded area and a main information unrecorded area in accordance with address information which is pre-recorded on the recording medium, comprising:
reference signal generating means for generating a first reference signal corresponding to a reproduced signal of the main information;
selecting means for selecting one of the reproduced signal and the first reference signal, which are entered into said selecting means;
controlling means, which generates a selection instructing signal in response to the address information, for controlling said selecting means in accordance with said selection-instructing signal such that the reproduced signal is selected during reproducing of the main information recorded area while the first reference signal is selected during reproducing of the main information unrecorded area; and, reproduced signal processing means, which is connected with said selecting means and generates a clock synchronized with the output of said selecting means, for carrying out the reproducing process of the main information in response to said clock.

2. The information reproducing apparatus as set forth in claim 1, wherein said controlling means includes:
timing generating means for generating a timing signal for each synchronized signal of the address information; and synchronizing means for identifying between start and end positions of the main information recorded area according to said timing signal,and for synchronizing said selection-instructing signal with said timing signal.

3. The information reproducing apparatus as set forth in claim 1, wherein said controlling means includes:
a sector timing generating circuit for generating a sector timing pulse, said sector timing pulse being generated by delaying an entered sector synchronizing signal by a predetermined time period; and a flip-flop circuit having a clock input terminal, a data input terminal and an output terminal, wherein said sector timing pulse is input to the clock input terminal, a signal for the selecting operation is input to the data input terminal, and said selection-instructing signal is output from the output terminal.

4. The information reproducing apparatus as set forth in claim 1, wherein said reference signal generating means includes oscillating means for outputting a clock signal having a frequency of a predetermined multiple of an audio sampling frequency, wherein said first reference signal is synthesized so as to alternate between a first signal equal to 23 clock periods of said clock signal and a second signal equal to 24 clock periods of said clock signal.

5. The information reproducing apparatus as set forth in claim 1, wherein said reference signal generating means is a recording signal processing means which processes externally-entered recording information for conversion into a recording signal having a signal format suitable for the type of recording medium, the converted signal being the first reference signal.

6. The information reproducing apparatus as set forth in claim 1, further comprising:
first clock generating means, connected with said selecting means, for generating a write-address generating-use clock in response to said selecting means;
write-address generating means for generating a write address in response to the write-address generating-use clock;

second clock generating means for outputting a clock for generating said first reference signal to said reference signal generating means, and for generating a read-address generating-use clock;
read-address generating means for generating a read address in response to the read-address generating-use clock; and memory means wherein reproduced data are written with respect to the generated write address while the reproduced data are read from the generated read address.

7. An information reproducing apparatus for reproducing main information from a desired area of a recording medium, comprising:
reference-signal generating means for generating a first reference signal corresponding to a reproduced signal of the main information;
selecting means for selecting one of the reproduced signal and the first reference signal, which are entered to said selecting means;
reproduced-signal detecting means for detecting a state of the reproduced signal from the recording medium, and for outputting the detected state as a selection-instructing signal;
controlling means for controlling said selecting means in accordance with said selection-instructing signal, such that the reproduced signal is selected during reproducing of the main information recorded area while the first reference signal is selected during reproducing of the main information unrecorded area; and reproduced signal processing means, which is connected with said selecting means and generates a clock synchronized with the output of said selecting means, for carrying out the reproducing process of the main information in response to said clock.

8. The information reproducing apparatus as set forth in claim 7, wherein said reproduced-signal detecting means includes:
peak-hold circuit means for holding each peak level of an entered binary magneto-optical signal;

low-pass filter means for removing high-frequency components of an output of said peak-hold circuit means so as to carry out an envelope detection;
binary circuit means for converting the envelope-detected output into a binary signal, and for outputting the binary signal as said selection-instructing signal.

9. The information reproducing apparatus as set forth in claim 7, wherein said reference-signal generating means includes oscillating means for outputting a clock signal having a frequency of a predetermined multiple of an audio sampling frequency;
wherein said first reference signal is synthesized so as to alternate between a first signal equal to 23 clock periods of said clock signal and a second signal equal to 24 clock periods of said clock signal.

10. The information reproducing apparatus as set forth in claim 7, wherein said reference-signal generating means is a recording-signal processing means which processes externally-entered recording information so as to be converted into a recording signal having a signal format suitable for the type of recording medium, the converted signal being the first reference signal.

11. The information reproducing apparatus as set forth in claim 7, further comprising:
first clock generating means, connected with said selecting means, for generating a write-address generating-use clock in response to said selecting means;
write-address generating means for generating a write address in response to the write-address generating-use clock;
second clock generating means for outputting a clock for generating said first reference signal to said reference-signal generating means, and for generating a read-address generating-use clock;

read-address generating means for generating a read address in response to the read-address generating-use clock; and memory means wherein reproduced data are written with respect to the generated write address while the reproduced data are read from the generated read address.

12. The information reproducing apparatus as set forth in claim 1, wherein the recording medium is a rewritable disk which is compatible with a compact disk.

13. The information reproducing apparatus as set forth in claim 7, wherein the recording medium is a rewritable disk which is compatible with a compact disk.

14. An information reproducing apparatus for reproducing with respect to a recording medium having address information pre-recorded, comprising:
an optical head;
means for converting main information, which is reproduced from the recording medium through said optical head, into a binary signal;
reference signal generating means for generating a first reference signal corresponding to the reproduced signal of the main information;
means for detecting the address information;
means for identifying, in accordance with the detected address information, between a main information recorded area and a main information unrecorded area, and for outputting the identified result as a selection-instructing signal;
selecting means for selecting the reproduced signal during reproducing of the main information recorded area while selecting the first reference signal during reproducing of the main information unrecorded area in accordance with said selection-instructing signal; and reproduced-signal processing means, which is connected with said selecting means and generates a clock synchronized with the output of said selecting means, for carrying out the reproducing process of the main information in response to said clock.

15. The information reproducing apparatus as set forth in claim 14, further comprising:
first clock generating means, connected with said selecting means, for generating a write-address generating-use clock in response to said selecting means;
write-address generating means for generating a write address in response to the write-address generating-use clock;
second clock generating means, which outputs a clock for generating the first reference signal, for generating a read address generating-use clock;
read-address generating means for generating a read address in response to the read-address generating-use clock;
switching means for switching between the read address and the write address; and memory means, wherein the reproduced data are written to and read from the specified address of said switching means.

16. The information reproducing apparatus as set forth in claim 14, wherein said selection-instructing signal outputting means includes:
a sector-timing-generating circuit for generating a sector timing pulse, said sector timing pulse being generated by delaying an entered sector-synchronizing signal by a predetermined time period; and a flip-flop circuit having a clock input terminal, a data input terminal and an output terminal, wherein said sector timing pulse is input to the clock input terminal, a signal for the selection operation is input to the data input terminal, and said selection-instructing signal is output from the output terminal.

17. An information reproducing apparatus for reproducing main information from a desired area of a recording medium, comprising:
an optical head;
means for converting the main information reproduced through the optical head into a binary signal;
reference-signal generating means for generating a first reference signal corresponding to the reproduced signal of the main information;
reproduced-signal detecting means for detecting a state of the reproduced signal in accordance with the binary main information, and for outputting the detected result as a selection-instructing signal;
selecting means for selecting the reproduced signal during reproducing of the main information recorded area while selecting the first reference signal during reproducing of the main information unrecorded area in accordance with said selection-instructing signal; and reproduced-signal processing means, which is connected with said selecting means and generates a clock synchronized with the output of said selecting means, for carrying out the reproducing process of the main information in response to said clock.

18. The information reproducing apparatus as set forth in claim 17, further comprising:
first clock generating means, connected with said selecting means, for generating a write-address generating-use clock in response to said selecting means;
write-address generating means for generating a write address in response to the write-address generating-use clock;
second clock generating means, which outputs a clock for generating the first reference signal, for generating a read-address generating-use clock;
read-address generating means for generating a read address in response to the read-address generating-use clock;

switching means for switching between the read address and the write address; and memory means wherein the reproduced data are written to and read from the specified address of said switching means.

19. The information reproducing apparatus as set forth in claim 17, wherein said reproduced-signal detecting means includes:
peak-hold circuit means for holding each peak level of an entered binary magneto-optical signal;
low-pass filter means for removing high-frequency components of an output of said peak-hold circuit means so as to carry out an envelope detection;
binary circuit means for converting the envelope-detection signal into a binary signal, and for outputting the binary signal as said selection-instructing signal.

20. An information reproducing apparatus for reproducing with respect to a recording medium having address information pre-recorded, comprising:
an optical head;
means for converting the main information reproduced through the optical head into a binary signal;
recording-signal processing means, which processes externally-entered recording information for conversion into a recording signal having a signal format suitable for the type of recording medium, and outputs the converted recording signal;
means for detecting the address information;
means for identifying, in accordance with the detected address information, between a main information recorded area and a main information unrecorded area, and for outputting the identified result as a selection-instructing signal;

selecting means for selecting the reproduced signal during reproducing of the main information recorded area while selecting the first reference signal during reproducing of the main information unrecorded area, in accordance with said selection-instructing signal; and reproduced-signal processing means, which is connected with said selecting means and generates a clock synchronized with the output of said selecting means, for carrying out the reproducing process of the main information in response to said clock.

21. The information reproducing apparatus as set forth in claim 20, further comprising:
first clock generating means, connected with said selecting means, for generating a write-address generating-use clock in response to said selecting means;
write-address generating means for generating a write address in response to the write-address generating-use clock;
second clock generating means, which outputs a clock for generating the first reference signal, for generating a read-address generating-use clock;
read-address generating means for generating a read address in response to the read-address generating-use clock;
switching means for switching between the read address and the write address; and memory means, wherein the reproduced data are written to and read from the specified address of said switching means.

22. The information reproducing apparatus as set forth in claim 20, wherein said selection-instructing signal outputting means includes:
a sector timing generating circuit for generating a sector timing pulse, said sector timing pulse being generated by delaying an entered sector-synchronizing signal by a predetermined time period; and a flip-flop circuit having a clock input terminal, a data input terminal and an output terminal;
wherein said sector timing pulse is input to the clock input terminal, a signal for the selection operation is input to the data input terminal, and said selection-instructing signal is output from the output terminal.

23. A method for reproducing main information from a desired area of a recording medium, comprising the steps of:
(a) generating a first reference signal corresponding to a reproduced signal of the main information;
(b) identifying between reproducing of a main information recorded area and reproducing of a main information unrecorded area;
(c) selecting the reproduced signal during the reproducing of the main information recorded area while selecting the first reference signal during the reproducing of the main information unrecorded area; and (d) generating a clock synchronized with the selected signal in the step (c), and carrying out the reproducing process of the main information in response to the clock.

24. The information reproducing method as set forth in claim 23, said identifying step (b) being carried out based on address information which is pre-recorded on the recording medium.

25. The information reproducing method as set forth in claim 23, said identifying step (b) being carried out based on detection of the state of the reproduced signal.