CA2009548A1 - Single physical main storage shared by two or more processors executing respective operating systems - Google Patents

Single physical main storage shared by two or more processors executing respective operating systems

Info

Publication number
CA2009548A1
CA2009548A1 CA2009548A CA2009548A CA2009548A1 CA 2009548 A1 CA2009548 A1 CA 2009548A1 CA 2009548 A CA2009548 A CA 2009548A CA 2009548 A CA2009548 A CA 2009548A CA 2009548 A1 CA2009548 A1 CA 2009548A1
Authority
CA
Canada
Prior art keywords
processors
operating system
operating systems
pairs
main storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2009548A
Other languages
French (fr)
Other versions
CA2009548C (en
Inventor
Ernest D. Baker
John M. Dinwiddie, Jr.
Lonnie E. Grice
John M. Loffredo
Kenneth R. Sanderson
Gustavo A. Suarez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CA2009548A1 publication Critical patent/CA2009548A1/en
Application granted granted Critical
Publication of CA2009548C publication Critical patent/CA2009548C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Abstract

The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors dirertly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
CA002009548A 1989-05-17 1990-02-07 Single physical main storage shared by two or more processors executing respective operating systems Expired - Fee Related CA2009548C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/353,113 US5144692A (en) 1989-05-17 1989-05-17 System for controlling access by first system to portion of main memory dedicated exclusively to second system to facilitate input/output processing via first system
US07/353,113 1989-05-17

Publications (2)

Publication Number Publication Date
CA2009548A1 true CA2009548A1 (en) 1990-11-17
CA2009548C CA2009548C (en) 1996-07-02

Family

ID=23387812

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002009548A Expired - Fee Related CA2009548C (en) 1989-05-17 1990-02-07 Single physical main storage shared by two or more processors executing respective operating systems

Country Status (9)

Country Link
US (2) US5144692A (en)
EP (1) EP0398695B1 (en)
JP (1) JP2618072B2 (en)
AT (1) ATE170643T1 (en)
BR (1) BR9002304A (en)
CA (1) CA2009548C (en)
DE (1) DE69032607T2 (en)
PT (1) PT94055A (en)
SG (1) SG45151A1 (en)

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Also Published As

Publication number Publication date
US5144692A (en) 1992-09-01
SG45151A1 (en) 1998-01-16
EP0398695A3 (en) 1994-02-02
JP2618072B2 (en) 1997-06-11
US5363497A (en) 1994-11-08
JPH0374756A (en) 1991-03-29
EP0398695A2 (en) 1990-11-22
CA2009548C (en) 1996-07-02
DE69032607T2 (en) 1999-05-27
BR9002304A (en) 1991-08-06
ATE170643T1 (en) 1998-09-15
DE69032607D1 (en) 1998-10-08
EP0398695B1 (en) 1998-09-02
PT94055A (en) 1991-11-29

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