CA2009494A1 - Capacitive accelerometer with mid-plane proof mass - Google Patents
Capacitive accelerometer with mid-plane proof massInfo
- Publication number
- CA2009494A1 CA2009494A1 CA002009494A CA2009494A CA2009494A1 CA 2009494 A1 CA2009494 A1 CA 2009494A1 CA 002009494 A CA002009494 A CA 002009494A CA 2009494 A CA2009494 A CA 2009494A CA 2009494 A1 CA2009494 A1 CA 2009494A1
- Authority
- CA
- Canada
- Prior art keywords
- plate
- sensing plate
- proof mass
- sensing
- support members
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
- G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
- G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
- G01P15/0802—Details
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
- G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
- G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
- G01P15/125—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by capacitive pick-up
Abstract
Abstract of the Disclosure Capacitive Accelerometer with Mid-Plane Proof Mass A micromachined three-plate capacitive accelerometer incorporates a "sandwich" proof mass formed from two layers that are boron-doped to define hinges attached essentially to the mldplane of the proof mass by being placed abutting a bonding interface region at the midplane.
R-3325hs-ed
R-3325hs-ed
Description
2~0~494 Description Capacitive Accelerometer With Mid-Plane Proof Mass Technical Field This invention relates to solid state capacitive accelerometer5 micro-machined from silicon.
Background Art In the field of accelerometers, it is kno~n to form a small compact accelerometer by etching the relevant parts out of silicon. U.S. Patent 4,574,327 illustrates one version of such a transducer in which a proof mass having a textured surface containing many grooves and apertures extending through the proof mass has its surface tailored in order to achieve the desired frequency response by using the squeeze-film damping phenomenon.
Other forms of micro-accelerometers employ cantilever proof masses that introduce an asymmetry that can give an undesirable cross-axis sensitivity.
$he preceding '327 patent avoids that asymmetric effect by showing a ~lexible hinge all around the proof mass so that the response is directed ~ preferentially to an axis perpendicular to the plane;of the proor mass.
R-3325hs-ed ~: :
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.
. . . .
20C~949~
Preferably, the hinges are mounted in the mid-plane of the proof mass to avoid torques that will couple accelerations on different axes, but accurate location in the mid-plane is difficult.
The problem solved by the present invention is that prior art mid-plane proof masses were formed by boron-doping the top surface of a silicon wafer and then growing an epitaxial layer above the doped surface to a height that matched the thickness of the silicon under the doped layer. This was a very 810w and expensi~e proces~.
More important, this process invariably laads to induced stresses in the proof mass structure formed thereby, leading to high device temperature sensitivities and lack of device-to-device reproducibility in accelerometer span and bias offset. Alternate etching from ~oth sides of ~n undoped wafer has been employed to define mid-plana hinges. This process i8 controlled only by the duration of the etch. HowevQr, since the thickness of the proof mas~ structure is typically 10 mil8, while hinge thicknesse~ are typically 0.1 mil~, this technique does not lead to good device-to-device reproducibility on a wafer-to-wafer basis.
Disclosure of Invention The invention relates to an improved capacitive accelerometer in which a three-plate capacitor i8 formed with the proof mass being the central plate. The proof mass i~ suspended from a silicon frame by means o~ a novel arrangement o~
flexures, located at the top and bottom surfaces of a mid-plane interface region, that have highly improved symmetry re~ulting in decreased cross-axis coupling while at the samQ time being easy to fa~ricate to an extremely high pracision and .., .
-...
. , . -2~)0~49~
reproducibility with minimal induced stress in the critical hinge support region and attached proof mass structure.
Brief Description of Drawings Fig. 1 illustrates in cross section an embodiment of the invention.
Fig. 2 illustrates in perspective a proof mass constructed according to the invention.
Best Mode for Carrying Out the Invention Referring now to Fig. 1, there i8 shown in cross section an embodiment of the invention adapted to register acceleration coaxial with an axis 230 extending upwardly through the drawing.
Electrically, the apparatus is a three-plate capacitor in which top and bottom plates 20 and 30 respectively are formed of rigid silicon member~
that are bonded to an intermediate silicon frame 105 that contains a proo~ mas~ 110. Bonding, by mean~
of standard anodic or thermal methods, i8 between frame 105 and glass border~ 22 formed on the top and bottom plates 20 and 30 using standard glass deposition and etching techniques. Proof mas3 110 i~ formed from two silicon slabs 112 and 114 ~oin~d in interface region 115 by any convenient bonding process, such as sputtering a layer of aluminum on the mating surface~ and heating the "sandwich n at 700 C for 1 hour to bond the two slabs.
Alternatively, glas~ dielectric bond could be employed in place o~ the aluminum. The surfaces touching interface region 115 are boron-doped with a pattern that will correspond to the hinges to be ~ormed in a subsequent etching ~tep. As is cuetomary, the vertical dimension in the drawing is ... , ~ . . . .
. .
~ ' . ' ', '~ ~ ' ' ' ,. . : , :
200~49~
greatly exaggerated in order to show very thin feature~ of the invention.
Fig 1 illustrates an embodiment of the invention in which the left and right flexures are 5 in the bottom and top slabs, respectively, in order to emphasize the composite nature of the proof mass.
Those skilled in the art will readily be able to devise many other flexure layouts using the invention.
Further differences between the prior art and the present invention may be illustrated conveniently in Fig. 2, showing frame 105 and proof mass 110 in simplified perspectiv~. The same axi8 230 is the Z axi3 in this drawing with corre~ponding lS X axis 210 and Y axis 220 which lie on the midplane of the proof mass and pass through its centroid.
Proof mass llQ is surrounded by a gap 163 formed by anisotropic etchingO illustratively EDP etching, in the step that define~ the flexures 162 and 164. A
distinction between prior art arrangements and the present invention is that of the layout of the flexures, or hinge~, which couple proof mass 110 to frame 105. Looking along Y axis 220, it can be sQen that there i8 a relatively large flexure 162 in tha upper slab at both the top and bottom of the drawing. The f}exure in each slab is in a surface, called the flexure ~urface, that is adjacent to interface region 115. The two piece~ of sil~con 112 and 114 that are bonded tegether will be referred to as slab~ in order to distinguish them from the capacitor plate~. In th~ bottom slab of proo~ mass 110, there i8 a pair of s~aller flexures 164 disposed ~ymmetrically about Y axis 220, each having half the width of ~lexure 162, so that the total 3s stiffness of the flexures on the top and bottom surface is the same. Al~o, on the lower portion of ... .. . . .
: -.
200~14~4 gap 163 on the opposite side of the proof ma~s,there is a symmetric arrangement of corresponding flexures 162 and 164. Thus, not only is th~ top and bottom of the arrangement symmetric about axis 220, S but also it i8 symmetric about X axi~ 210 since there is a balance on the top and bottom of the drawing.
on the left and right of the drawing, there is a corresponding symmetric arrangement of flexures 164 and 162 that differs from the top and bottom sides in that the smaller flexures 164 are on the top slab and the larger one, 162, is on the botto~
slab. The symmetry of thi arrangement can be seen by looXing at axes 240 and 250, respectively, which extend along the diagonals of ths squar~ proof mass 110 midplane. Looking at axis 240, for exampl~, there is a flexure 164 on the bottom surface of proof mass 110 on the left and a corresponding flexure 164 on the top surface on ths right. Thia would induce a slight torqua about axis 240 but that is balanced by corresponding flexures 162 on thQ
bottom right and top left, respectively. Similarly, about axis 250, there is a corresponding top/bottom matching of flexures, both flexure3 being spaced equally from the corner. For purposes of this application, the arrangement shown in Fig 1 will be referred to as being s y etric about the diagonal plan~ defined by axes 230 and 240 and axe~ 230 nnd 250, even though corresponding flexures are in opposite top or bottom slabs of the proof mass.
The flexure layout i8 not, of course, confined to a three-flexure per side arrangement and many other arrangement~ relative to widths, nu~bers and placement of the flexure~ will be evident to those skilled in the art. The principle being followad in thi~ embodiment i8 that of high symmetry about the `: :
~0(~9494 transverse axes 210 and 220 together with the out of plane symmetry about the diagonal axes 240 and 250.
Since the flexures 162 and 164 will be on the order of microns, as will layer 115, any torques or asymmetry introduced by the difference in vertical position will be extremely small.
The sequence of fabrication i~ that tha two silicon wafers that will become slab~ 112 and 11~
are doped with boron in a pattern corresponding to the flexures 162 and 164 in each slab. A layer of bonding material, such as sputtered aluminum is applied to each doped surface. In the case of aluminum, the layer is typically 2000 ~ngstroms thick. The wafers are aligned and bonded by hoating to a temperature of 700 C for 1 hour, or by any other convenient method that provides a stres~ ~ree bond. The combined ~labs are wet etched in order to cut gaps 163 and de~ine flexures 162 and 164. In Fig 1, the assembly is shown with a left-right misalignment to illustrate that the alignment is not critical, since the dimensions of the gaps and proof masses are are on the order of millimeters in tha horizontal direction in the Figure. The critical dimensions of microns ars in the vertical direction in the Figure and are not af~ected by misalig D ent.
Alternatively, a dielectric material such as a glass can be deposited by techniques ~uch as ion milling on one slab. Subsequently, the second slab i9 electrostatically bonded to the deposited dielectric layer. I~ desired, the top and bottom 31abs can be electrically isolated by this method, which provides additional flexibility for the as ociated electrical current that measure the capacitance.
According to the present invention, the flexures 162 and 164 are fabricated by masXing and - . , ~.
;~0~494 boron doping the top surface of a silicon wafer illustratlvely 10 mils in thickness such that the limit of 6xl019 boron atoms per cubic centimeter is reached at the depth corresponding to the desired S flexure thickness, illustratively 2 microns. With this arrangement, the boron layers, in the top and bottom surfaces, serve as etch stops ~or a standard anisotropic etchant, illu~trativ~ly ethylenediamine pyrocatohol (EDP), 80 that when gap 163 is etched, the gap i5 opened until the boron layer is reachad which serves as an etch stop in those areas where it exists and the etchant opens the apertures around the gap 163. Preferably, the wafer is etched ~ro~
both top and bottom at the same time by immersing in a fluid bath~
With this technique, the thickness of the flexures is precisely defined. Moreover, the flexures are located precisely adjacent to th~
mid-plane of the proof ma~s, overcoming th~ ma~or short ~all of prior art techniques.
Referring back to Fig. 1, it can be sQen that the cross section is taken through the Y~Z plan~
showing two of flexures 162 at the top of proof ~ass 110. Apertures 24 in the top plate 20 and 26 in bottom plate 30 have been opened by any convenient etching method to sharply define the area of the variable capacitors formed by plates 20 and 30 and the proof mass 110 and also to reduce parasitic capacitance. When the proof mas~ is displaced downward, gas will be forced out of or into the inter-plate chambers 32 and 34 into these apertures and into other apertures described below.
It has been found that substantial factors in the temperature and temporal stability o~ capacitor transducers are the temperature coef~icient and ths aging characteri~tics of the gla~s dielectric 22 .
2~0~94 which bonds together the several plates of the capacitor. The smaller the bond area and the greater the thickness of the glass dielectric 22 between plates 20 and 30 and the frame 105, the less s effect the temperature and aging will have on the capacitance measurement being made. Preferably, the thickness of bonding glass 22 is relatively large compared with the capacitor gap and the horizontal dimension of the bonding glass 22 is relatively small compared with the width of mesa 31. In an illustrative example, the width of mesas 31 and 33 was about 0.150 inch and the width of the glass 22 was about 0.010 inch. Illustratively, the entirQ
arrangement will be enclosed in a hermet~cally sealed enclosure having a pressure cho~en for convenient damping and a gas volume communicating with apertures 24 and 26 ~ar in exce~s of the volume of capacitance chambers 32 and 34 plu8 ths apertures 24 and 26.
In operation, as the unit is accelerated upwards along axis 230, the proof mass 110 will drop toward the bottom in the diagram reducing the gap between surfaces 56 and 58 and thus, the ga~ volume in lower chamber 34. Insulating travel stops 72 are shown as being located at various locations on mesas 31 and 33 in order to prevent the proof ma~s from coming in ccntact with either mesa. These 6tops are illustratively glass coated in order to prevent electrical short circuits when the proof mass touchQs them and have illustrative dimension~ of 0.005 inch in width and 0.4 micron in height, with a glas~ layer of 0.5 micron in thickne~s for insulation.
The squeeze film damping phenomenon i~ used to control the frequency response of the proof mass. A
sample channel or passageway 42 is shown that serves ;" ' ~ 7 ' '~
- 200~1494 to provide a reservoir to hold displaced gas that is squeezed out from the volume between the plates.
This channel will be part of a network cover~ng surfaces 5a and 52. A~ chamber 34 contracts, gas is forced into these reservoirs 42. The total volume of the gas reservoirs should be considerably greater than the change in volume of gas chamber 34 so that there will be only a small increase in pressure in the reservoirs. Preferably, the ratio is about 10 to 1 or greater and the channel~ have a width of 0.005" and a depth of 12 micron~. Channels 42 are formed by any of the standard silicon processing techniques, such as ion milling or reactive ion etching. Since the pas~ageways are relatively shallow, little additional surface area is removed beyond that associated with their width in spite of the non-vertical wall~ that re~ult from a wet etch process, as illustrated in the figure. In contra~t, if the passaqeways are formed in the proof mass, its much greater thickness (typically .01") requires deep trenches in order to form the through holes, thereby removing appreclable mass and surface area.
Thus, the surface area effectively available for the capacitor is much reduced, and for a given capacitance the area of the capacitor itself must be larger. With this arrangement o~ relatively narrow shallow trenches in mesas 31 and 33, the effective area available for the capacitance measurement i8 maximized and, sir.ce the proof mass is not pierced and trenched, maximum inertial mas~ is retained.
These channels 42 communicate with reservoir 26 by extending perpendicular to the plane of the paper and/or in the plane of the paper.
The overall arrangement of upper plate 20, lower plate 30 and ~rame 105 is supported by any convenient mean~, such as a three-dimensional lower ' ~
200~494 frame having a generally U-shaped cross section and connected to frame 105 by glass joints similar to joints 22. An advantage of this method i that the thermal effects of heat conduction or loss to the outside world are entered through frame 105 symmetrically relative to the upper and lower plates. If the device were mountsd on lower plate 30, for example, that would usually bQ at a different temperature from upper plate 20 with consequent thermal stre~ses and distortion and different tempexatures experienced by the gla~s dielectric capacitors.
For a given surface area, the capacitance o~
the upper and lower capacitors i~ set by the gap between the proof mass and the surfaces of the top and bottom plates. This gap, illustratively 2 microns, is determined both by the thicknes~ o~
glass layers 22 which are deposited acro~s the surface of the wafer3 and etched away except in predetermined areas and by the heights of mesas 31 and 33. Consequently, the gap can be controlled simply by changing the thicknes~ of glas~ layer 22, in contrast to other art wherein the gap is s~t by removing material from the face of the proof mass.
It is a further advantageous feature of this invention that the network o~ damping passageway have minimal impact on the surface areaq 52 and 58, and therefore on the capac$tance , and being located on the plates 20 and 30 rather than on the proof mass 110 have no effect on the maximum detectable acceleration GmaX. For a given capacitance, tha full scale range can be controlled independently by selectin~ the thickne~ of the proof mass and by controlling the numbers and the thicknes~es of flexure~ 162 and 164 and their lengths and wldths.
In the illustrative embodiment, flexures 162 and 164 -.. . .. .
. ..
.
- .
20(~49a~
had a thickness of 2.5 micron~ and respectiv~ widths of 0.066" and 0.033" for gap spacing 163 of 0.010"
and a proof mass 110 having a thickness of 0.010"
and a mass of 7 milligram~. Sinc~ no material i8 removed from the proof mass to creat~ the damping passageways in this invention, GmaX is independent of damping characteristics. Further, since tho sensitivity is proportional to the ratio o~ the nominal capacitance to G~aX, two of the three parameters, sensitivity, capacitancQ and GmaX can be selected independently with the damping characteri~tics being virtually independent o~
these. This is in contrast to prior art designs wherein these parameters are all closely linked together and compromi~ed because of the extensive sculpturing of the proof ~as~.
Referring now to the method of ~abri~ation, the top and bottom silicon slabA 20 and 30 having a nominal thickness of O.OS0~ have within them top and bottom mesas referred to by the numerals 33 and 31, respectively. The3e mesas are formed by repeated oxidation of the areas that will be gas plenums 24 and 26 and that will contain the glass spacers 22, followed by etching to remove the silicon dioxide formed in repeated oxidation. The result of thi~
method is a desirable, tightly controlled mesa area surrounded by extremely s~ooth surface upon which the glass dielectric is deposited. Further details may be found in copending commonly owned 3~ application, Attorney Docket Number R-3272hsed, filed on the same day herewith and incorporated by ; reference herein.
I n an preferred e~bodiment, a closed loop configuration would result in even better performance. The electronic portion of th~
appaxatus is illustrated schematically in box 310.
.. . ~ .
- .
.
' 2(10~49~
This box contains straightforward circuits which may apply forcing voltages to the electrodes ~or closed loop operation and also to sense capacitance by monitoring the unbalance of thQ high frequency bridge circuit of which the three-plate capacitor forms a part. A signal proportional to the external acceleration is derived from the forcing voltage~
re~uired to return the proo~ mas~ to its null position. Further details may be found in copending commonly owned application, Attorney Docket number R-3320hsed, filed on the 3ame day her~with and incorporated by reference her~in.
It should be understood that the invention i8 not limited to the particular embodiments shown and described herein, but that various chan~es and modifications may be made without departing from the spirit and scope of this novel concept as definad by the following claims.
, . . . - . . .. .
, ~
. : ~ , . .
Background Art In the field of accelerometers, it is kno~n to form a small compact accelerometer by etching the relevant parts out of silicon. U.S. Patent 4,574,327 illustrates one version of such a transducer in which a proof mass having a textured surface containing many grooves and apertures extending through the proof mass has its surface tailored in order to achieve the desired frequency response by using the squeeze-film damping phenomenon.
Other forms of micro-accelerometers employ cantilever proof masses that introduce an asymmetry that can give an undesirable cross-axis sensitivity.
$he preceding '327 patent avoids that asymmetric effect by showing a ~lexible hinge all around the proof mass so that the response is directed ~ preferentially to an axis perpendicular to the plane;of the proor mass.
R-3325hs-ed ~: :
:
-, . , . ~ :
~ ' ,- -::
.
. . . .
20C~949~
Preferably, the hinges are mounted in the mid-plane of the proof mass to avoid torques that will couple accelerations on different axes, but accurate location in the mid-plane is difficult.
The problem solved by the present invention is that prior art mid-plane proof masses were formed by boron-doping the top surface of a silicon wafer and then growing an epitaxial layer above the doped surface to a height that matched the thickness of the silicon under the doped layer. This was a very 810w and expensi~e proces~.
More important, this process invariably laads to induced stresses in the proof mass structure formed thereby, leading to high device temperature sensitivities and lack of device-to-device reproducibility in accelerometer span and bias offset. Alternate etching from ~oth sides of ~n undoped wafer has been employed to define mid-plana hinges. This process i8 controlled only by the duration of the etch. HowevQr, since the thickness of the proof mas~ structure is typically 10 mil8, while hinge thicknesse~ are typically 0.1 mil~, this technique does not lead to good device-to-device reproducibility on a wafer-to-wafer basis.
Disclosure of Invention The invention relates to an improved capacitive accelerometer in which a three-plate capacitor i8 formed with the proof mass being the central plate. The proof mass i~ suspended from a silicon frame by means o~ a novel arrangement o~
flexures, located at the top and bottom surfaces of a mid-plane interface region, that have highly improved symmetry re~ulting in decreased cross-axis coupling while at the samQ time being easy to fa~ricate to an extremely high pracision and .., .
-...
. , . -2~)0~49~
reproducibility with minimal induced stress in the critical hinge support region and attached proof mass structure.
Brief Description of Drawings Fig. 1 illustrates in cross section an embodiment of the invention.
Fig. 2 illustrates in perspective a proof mass constructed according to the invention.
Best Mode for Carrying Out the Invention Referring now to Fig. 1, there i8 shown in cross section an embodiment of the invention adapted to register acceleration coaxial with an axis 230 extending upwardly through the drawing.
Electrically, the apparatus is a three-plate capacitor in which top and bottom plates 20 and 30 respectively are formed of rigid silicon member~
that are bonded to an intermediate silicon frame 105 that contains a proo~ mas~ 110. Bonding, by mean~
of standard anodic or thermal methods, i8 between frame 105 and glass border~ 22 formed on the top and bottom plates 20 and 30 using standard glass deposition and etching techniques. Proof mas3 110 i~ formed from two silicon slabs 112 and 114 ~oin~d in interface region 115 by any convenient bonding process, such as sputtering a layer of aluminum on the mating surface~ and heating the "sandwich n at 700 C for 1 hour to bond the two slabs.
Alternatively, glas~ dielectric bond could be employed in place o~ the aluminum. The surfaces touching interface region 115 are boron-doped with a pattern that will correspond to the hinges to be ~ormed in a subsequent etching ~tep. As is cuetomary, the vertical dimension in the drawing is ... , ~ . . . .
. .
~ ' . ' ', '~ ~ ' ' ' ,. . : , :
200~49~
greatly exaggerated in order to show very thin feature~ of the invention.
Fig 1 illustrates an embodiment of the invention in which the left and right flexures are 5 in the bottom and top slabs, respectively, in order to emphasize the composite nature of the proof mass.
Those skilled in the art will readily be able to devise many other flexure layouts using the invention.
Further differences between the prior art and the present invention may be illustrated conveniently in Fig. 2, showing frame 105 and proof mass 110 in simplified perspectiv~. The same axi8 230 is the Z axi3 in this drawing with corre~ponding lS X axis 210 and Y axis 220 which lie on the midplane of the proof mass and pass through its centroid.
Proof mass llQ is surrounded by a gap 163 formed by anisotropic etchingO illustratively EDP etching, in the step that define~ the flexures 162 and 164. A
distinction between prior art arrangements and the present invention is that of the layout of the flexures, or hinge~, which couple proof mass 110 to frame 105. Looking along Y axis 220, it can be sQen that there i8 a relatively large flexure 162 in tha upper slab at both the top and bottom of the drawing. The f}exure in each slab is in a surface, called the flexure ~urface, that is adjacent to interface region 115. The two piece~ of sil~con 112 and 114 that are bonded tegether will be referred to as slab~ in order to distinguish them from the capacitor plate~. In th~ bottom slab of proo~ mass 110, there i8 a pair of s~aller flexures 164 disposed ~ymmetrically about Y axis 220, each having half the width of ~lexure 162, so that the total 3s stiffness of the flexures on the top and bottom surface is the same. Al~o, on the lower portion of ... .. . . .
: -.
200~14~4 gap 163 on the opposite side of the proof ma~s,there is a symmetric arrangement of corresponding flexures 162 and 164. Thus, not only is th~ top and bottom of the arrangement symmetric about axis 220, S but also it i8 symmetric about X axi~ 210 since there is a balance on the top and bottom of the drawing.
on the left and right of the drawing, there is a corresponding symmetric arrangement of flexures 164 and 162 that differs from the top and bottom sides in that the smaller flexures 164 are on the top slab and the larger one, 162, is on the botto~
slab. The symmetry of thi arrangement can be seen by looXing at axes 240 and 250, respectively, which extend along the diagonals of ths squar~ proof mass 110 midplane. Looking at axis 240, for exampl~, there is a flexure 164 on the bottom surface of proof mass 110 on the left and a corresponding flexure 164 on the top surface on ths right. Thia would induce a slight torqua about axis 240 but that is balanced by corresponding flexures 162 on thQ
bottom right and top left, respectively. Similarly, about axis 250, there is a corresponding top/bottom matching of flexures, both flexure3 being spaced equally from the corner. For purposes of this application, the arrangement shown in Fig 1 will be referred to as being s y etric about the diagonal plan~ defined by axes 230 and 240 and axe~ 230 nnd 250, even though corresponding flexures are in opposite top or bottom slabs of the proof mass.
The flexure layout i8 not, of course, confined to a three-flexure per side arrangement and many other arrangement~ relative to widths, nu~bers and placement of the flexure~ will be evident to those skilled in the art. The principle being followad in thi~ embodiment i8 that of high symmetry about the `: :
~0(~9494 transverse axes 210 and 220 together with the out of plane symmetry about the diagonal axes 240 and 250.
Since the flexures 162 and 164 will be on the order of microns, as will layer 115, any torques or asymmetry introduced by the difference in vertical position will be extremely small.
The sequence of fabrication i~ that tha two silicon wafers that will become slab~ 112 and 11~
are doped with boron in a pattern corresponding to the flexures 162 and 164 in each slab. A layer of bonding material, such as sputtered aluminum is applied to each doped surface. In the case of aluminum, the layer is typically 2000 ~ngstroms thick. The wafers are aligned and bonded by hoating to a temperature of 700 C for 1 hour, or by any other convenient method that provides a stres~ ~ree bond. The combined ~labs are wet etched in order to cut gaps 163 and de~ine flexures 162 and 164. In Fig 1, the assembly is shown with a left-right misalignment to illustrate that the alignment is not critical, since the dimensions of the gaps and proof masses are are on the order of millimeters in tha horizontal direction in the Figure. The critical dimensions of microns ars in the vertical direction in the Figure and are not af~ected by misalig D ent.
Alternatively, a dielectric material such as a glass can be deposited by techniques ~uch as ion milling on one slab. Subsequently, the second slab i9 electrostatically bonded to the deposited dielectric layer. I~ desired, the top and bottom 31abs can be electrically isolated by this method, which provides additional flexibility for the as ociated electrical current that measure the capacitance.
According to the present invention, the flexures 162 and 164 are fabricated by masXing and - . , ~.
;~0~494 boron doping the top surface of a silicon wafer illustratlvely 10 mils in thickness such that the limit of 6xl019 boron atoms per cubic centimeter is reached at the depth corresponding to the desired S flexure thickness, illustratively 2 microns. With this arrangement, the boron layers, in the top and bottom surfaces, serve as etch stops ~or a standard anisotropic etchant, illu~trativ~ly ethylenediamine pyrocatohol (EDP), 80 that when gap 163 is etched, the gap i5 opened until the boron layer is reachad which serves as an etch stop in those areas where it exists and the etchant opens the apertures around the gap 163. Preferably, the wafer is etched ~ro~
both top and bottom at the same time by immersing in a fluid bath~
With this technique, the thickness of the flexures is precisely defined. Moreover, the flexures are located precisely adjacent to th~
mid-plane of the proof ma~s, overcoming th~ ma~or short ~all of prior art techniques.
Referring back to Fig. 1, it can be sQen that the cross section is taken through the Y~Z plan~
showing two of flexures 162 at the top of proof ~ass 110. Apertures 24 in the top plate 20 and 26 in bottom plate 30 have been opened by any convenient etching method to sharply define the area of the variable capacitors formed by plates 20 and 30 and the proof mass 110 and also to reduce parasitic capacitance. When the proof mas~ is displaced downward, gas will be forced out of or into the inter-plate chambers 32 and 34 into these apertures and into other apertures described below.
It has been found that substantial factors in the temperature and temporal stability o~ capacitor transducers are the temperature coef~icient and ths aging characteri~tics of the gla~s dielectric 22 .
2~0~94 which bonds together the several plates of the capacitor. The smaller the bond area and the greater the thickness of the glass dielectric 22 between plates 20 and 30 and the frame 105, the less s effect the temperature and aging will have on the capacitance measurement being made. Preferably, the thickness of bonding glass 22 is relatively large compared with the capacitor gap and the horizontal dimension of the bonding glass 22 is relatively small compared with the width of mesa 31. In an illustrative example, the width of mesas 31 and 33 was about 0.150 inch and the width of the glass 22 was about 0.010 inch. Illustratively, the entirQ
arrangement will be enclosed in a hermet~cally sealed enclosure having a pressure cho~en for convenient damping and a gas volume communicating with apertures 24 and 26 ~ar in exce~s of the volume of capacitance chambers 32 and 34 plu8 ths apertures 24 and 26.
In operation, as the unit is accelerated upwards along axis 230, the proof mass 110 will drop toward the bottom in the diagram reducing the gap between surfaces 56 and 58 and thus, the ga~ volume in lower chamber 34. Insulating travel stops 72 are shown as being located at various locations on mesas 31 and 33 in order to prevent the proof ma~s from coming in ccntact with either mesa. These 6tops are illustratively glass coated in order to prevent electrical short circuits when the proof mass touchQs them and have illustrative dimension~ of 0.005 inch in width and 0.4 micron in height, with a glas~ layer of 0.5 micron in thickne~s for insulation.
The squeeze film damping phenomenon i~ used to control the frequency response of the proof mass. A
sample channel or passageway 42 is shown that serves ;" ' ~ 7 ' '~
- 200~1494 to provide a reservoir to hold displaced gas that is squeezed out from the volume between the plates.
This channel will be part of a network cover~ng surfaces 5a and 52. A~ chamber 34 contracts, gas is forced into these reservoirs 42. The total volume of the gas reservoirs should be considerably greater than the change in volume of gas chamber 34 so that there will be only a small increase in pressure in the reservoirs. Preferably, the ratio is about 10 to 1 or greater and the channel~ have a width of 0.005" and a depth of 12 micron~. Channels 42 are formed by any of the standard silicon processing techniques, such as ion milling or reactive ion etching. Since the pas~ageways are relatively shallow, little additional surface area is removed beyond that associated with their width in spite of the non-vertical wall~ that re~ult from a wet etch process, as illustrated in the figure. In contra~t, if the passaqeways are formed in the proof mass, its much greater thickness (typically .01") requires deep trenches in order to form the through holes, thereby removing appreclable mass and surface area.
Thus, the surface area effectively available for the capacitor is much reduced, and for a given capacitance the area of the capacitor itself must be larger. With this arrangement o~ relatively narrow shallow trenches in mesas 31 and 33, the effective area available for the capacitance measurement i8 maximized and, sir.ce the proof mass is not pierced and trenched, maximum inertial mas~ is retained.
These channels 42 communicate with reservoir 26 by extending perpendicular to the plane of the paper and/or in the plane of the paper.
The overall arrangement of upper plate 20, lower plate 30 and ~rame 105 is supported by any convenient mean~, such as a three-dimensional lower ' ~
200~494 frame having a generally U-shaped cross section and connected to frame 105 by glass joints similar to joints 22. An advantage of this method i that the thermal effects of heat conduction or loss to the outside world are entered through frame 105 symmetrically relative to the upper and lower plates. If the device were mountsd on lower plate 30, for example, that would usually bQ at a different temperature from upper plate 20 with consequent thermal stre~ses and distortion and different tempexatures experienced by the gla~s dielectric capacitors.
For a given surface area, the capacitance o~
the upper and lower capacitors i~ set by the gap between the proof mass and the surfaces of the top and bottom plates. This gap, illustratively 2 microns, is determined both by the thicknes~ o~
glass layers 22 which are deposited acro~s the surface of the wafer3 and etched away except in predetermined areas and by the heights of mesas 31 and 33. Consequently, the gap can be controlled simply by changing the thicknes~ of glas~ layer 22, in contrast to other art wherein the gap is s~t by removing material from the face of the proof mass.
It is a further advantageous feature of this invention that the network o~ damping passageway have minimal impact on the surface areaq 52 and 58, and therefore on the capac$tance , and being located on the plates 20 and 30 rather than on the proof mass 110 have no effect on the maximum detectable acceleration GmaX. For a given capacitance, tha full scale range can be controlled independently by selectin~ the thickne~ of the proof mass and by controlling the numbers and the thicknes~es of flexure~ 162 and 164 and their lengths and wldths.
In the illustrative embodiment, flexures 162 and 164 -.. . .. .
. ..
.
- .
20(~49a~
had a thickness of 2.5 micron~ and respectiv~ widths of 0.066" and 0.033" for gap spacing 163 of 0.010"
and a proof mass 110 having a thickness of 0.010"
and a mass of 7 milligram~. Sinc~ no material i8 removed from the proof mass to creat~ the damping passageways in this invention, GmaX is independent of damping characteristics. Further, since tho sensitivity is proportional to the ratio o~ the nominal capacitance to G~aX, two of the three parameters, sensitivity, capacitancQ and GmaX can be selected independently with the damping characteri~tics being virtually independent o~
these. This is in contrast to prior art designs wherein these parameters are all closely linked together and compromi~ed because of the extensive sculpturing of the proof ~as~.
Referring now to the method of ~abri~ation, the top and bottom silicon slabA 20 and 30 having a nominal thickness of O.OS0~ have within them top and bottom mesas referred to by the numerals 33 and 31, respectively. The3e mesas are formed by repeated oxidation of the areas that will be gas plenums 24 and 26 and that will contain the glass spacers 22, followed by etching to remove the silicon dioxide formed in repeated oxidation. The result of thi~
method is a desirable, tightly controlled mesa area surrounded by extremely s~ooth surface upon which the glass dielectric is deposited. Further details may be found in copending commonly owned 3~ application, Attorney Docket Number R-3272hsed, filed on the same day herewith and incorporated by ; reference herein.
I n an preferred e~bodiment, a closed loop configuration would result in even better performance. The electronic portion of th~
appaxatus is illustrated schematically in box 310.
.. . ~ .
- .
.
' 2(10~49~
This box contains straightforward circuits which may apply forcing voltages to the electrodes ~or closed loop operation and also to sense capacitance by monitoring the unbalance of thQ high frequency bridge circuit of which the three-plate capacitor forms a part. A signal proportional to the external acceleration is derived from the forcing voltage~
re~uired to return the proo~ mas~ to its null position. Further details may be found in copending commonly owned application, Attorney Docket number R-3320hsed, filed on the 3ame day her~with and incorporated by reference her~in.
It should be understood that the invention i8 not limited to the particular embodiments shown and described herein, but that various chan~es and modifications may be made without departing from the spirit and scope of this novel concept as definad by the following claims.
, . . . - . . .. .
, ~
. : ~ , . .
Claims (4)
1. A solid-state accelerometer comprising:
a three-plate capacitor including fixed top and bottom plates and a movable sensing plate having a top surface separated from said top plate by a top gap and a bottom surface separated from said bottom plate by a bottom gap, defining a reference midplane and being connected to support members by flexible connections extending across a support gap between said sensing plate and said support members to move between said top and bottom plates in response to acceleration along an acceleration axis perpendicular to said reference midplane, whereby acceleration along said acceleration axis displaces said sensing plate from said reference midplane and alters the capacitance between said sensing plate and said top and bottom plates, in which;
said top and bottom plates and said support members are bonded together to form a rigid structure:
said sensing plate is connected to said support members by at least one pair of flexures extending a predetermined hinge width along opposite sides of said sensing plate and having a predetermined hinge length less than the length of said sensing plate, so that a communication path is established between a top chamber between said top and said sensing plates and a bottom chamber between said bottom and said sensing plates;
at least one chamber has motion stops disposed therein and grooves to facilitate squeeze-film damping in one of said reference plate and said fixed plate; and electronic means for measuring the capacitance of at least one of said chambers, characterized in that:
said sensing plate is formed from top and bottom slabs bonded together at an interface region, each of said slabs being boron doped on a flexure surface abutting said interface region and is connected to said support members by flexures lying substantially in said flexure surfaces and being disposed about said support gap in a predetermined pattern, whereby said top and bottom slabs combine to form a composite sensing plate connected to said support members by said at least one pair of flexures disposed symmetrically in said top and bottom plates and substantially in said sensing plate midplane.
a three-plate capacitor including fixed top and bottom plates and a movable sensing plate having a top surface separated from said top plate by a top gap and a bottom surface separated from said bottom plate by a bottom gap, defining a reference midplane and being connected to support members by flexible connections extending across a support gap between said sensing plate and said support members to move between said top and bottom plates in response to acceleration along an acceleration axis perpendicular to said reference midplane, whereby acceleration along said acceleration axis displaces said sensing plate from said reference midplane and alters the capacitance between said sensing plate and said top and bottom plates, in which;
said top and bottom plates and said support members are bonded together to form a rigid structure:
said sensing plate is connected to said support members by at least one pair of flexures extending a predetermined hinge width along opposite sides of said sensing plate and having a predetermined hinge length less than the length of said sensing plate, so that a communication path is established between a top chamber between said top and said sensing plates and a bottom chamber between said bottom and said sensing plates;
at least one chamber has motion stops disposed therein and grooves to facilitate squeeze-film damping in one of said reference plate and said fixed plate; and electronic means for measuring the capacitance of at least one of said chambers, characterized in that:
said sensing plate is formed from top and bottom slabs bonded together at an interface region, each of said slabs being boron doped on a flexure surface abutting said interface region and is connected to said support members by flexures lying substantially in said flexure surfaces and being disposed about said support gap in a predetermined pattern, whereby said top and bottom slabs combine to form a composite sensing plate connected to said support members by said at least one pair of flexures disposed symmetrically in said top and bottom plates and substantially in said sensing plate midplane.
2. An accelerometer according to claim 1, further characterized in that said interface region is formed from a layer of metal bonded to said top and bottom slabs.
3. An accelerometer according to claim 1, further characterized in that said interface region is formed from a layer of dielectric material.
4. An accelerometer according to claim 3, further characterized in that said interface region is formed from a layer of dielectric material and in which said top and bottom slabs are electrically isolated from one another.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/317,258 US5008774A (en) | 1989-02-28 | 1989-02-28 | Capacitive accelerometer with mid-plane proof mass |
| US317,258 | 1989-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2009494A1 true CA2009494A1 (en) | 1990-08-31 |
Family
ID=23232843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002009494A Abandoned CA2009494A1 (en) | 1989-02-28 | 1990-02-07 | Capacitive accelerometer with mid-plane proof mass |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5008774A (en) |
| EP (1) | EP0386463B1 (en) |
| JP (1) | JPH02271262A (en) |
| BR (1) | BR9000845A (en) |
| CA (1) | CA2009494A1 (en) |
| DE (1) | DE69013540T2 (en) |
| IL (1) | IL93552A (en) |
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-
1989
- 1989-02-28 US US07/317,258 patent/US5008774A/en not_active Expired - Fee Related
-
1990
- 1990-02-02 DE DE69013540T patent/DE69013540T2/en not_active Expired - Fee Related
- 1990-02-02 EP EP90102091A patent/EP0386463B1/en not_active Expired - Lifetime
- 1990-02-07 CA CA002009494A patent/CA2009494A1/en not_active Abandoned
- 1990-02-22 BR BR909000845A patent/BR9000845A/en not_active Application Discontinuation
- 1990-02-27 IL IL93552A patent/IL93552A/en not_active IP Right Cessation
- 1990-02-28 JP JP2049165A patent/JPH02271262A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP0386463A2 (en) | 1990-09-12 |
| IL93552A0 (en) | 1990-11-29 |
| US5008774A (en) | 1991-04-16 |
| DE69013540T2 (en) | 1995-03-02 |
| EP0386463A3 (en) | 1992-03-11 |
| IL93552A (en) | 1993-05-13 |
| JPH02271262A (en) | 1990-11-06 |
| BR9000845A (en) | 1991-02-05 |
| EP0386463B1 (en) | 1994-10-26 |
| DE69013540D1 (en) | 1994-12-01 |
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| Date | Code | Title | Description |
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| EEER | Examination request | ||
| FZDE | Discontinued |